Configurable Hardware Architecture of Multidimensional Convolution Coprocessor

Simple item page
dc.contributor.authorGeranun Boonyuu
dc.contributor.authorSumek Wisayataksin
dc.date.accessioned2025-07-21T06:04:41Z
dc.date.issued2021-01-20
dc.identifier.doi10.1109/ica-symp50206.2021.9358447
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/10072
dc.subjectCoprocessor
dc.subjectConvolution (computer science)
dc.subjectKernel (algebra)
dc.subject.classificationAdvanced Neural Network Applications
dc.titleConfigurable Hardware Architecture of Multidimensional Convolution Coprocessor
dc.typeArticle

Files

Collections

All