Electronically tunable compact inductance simulator with experimental verification

dc.contributor.authorKapil Bhardwaj
dc.contributor.authorMayank Srivastava
dc.contributor.authorAnand Kumar
dc.contributor.authorRamendra Singh
dc.contributor.authorWorapong Tangsrirat
dc.date.accessioned2025-07-21T06:09:13Z
dc.date.issued2023-05-17
dc.description.abstractAbstract A novel inductance simulation circuit employing only two dual‐output voltage‐differencing buffered amplifiers (DO‐VDBAs) and a single capacitance (grounded) is proposed in this paper. The reported configuration is a purely resistor‐less realization that provides electronically controllable realized inductance through biasing quantities of DO‐VDBAs and does not rely on any constraints related to matched values of parameters. This structure exhibits excellent behavior under the influence of tracking errors in DO‐VDBAs and does not exhibit instability at high frequencies. The simple and compact metal‐oxide semiconductor (MOS) implementation of the DO‐VDBAs (eight MOS per DO‐VDBA) and adoption of grounded capacitance make the proposed circuit suitable for on‐chip realization from the perspective of chip area consumption. The function of the pure grounded inductance is validated through high pass/bandpass filtering applications. To test the proposed design, simulations were performed in the PSPICE environment. Experimental validation was also conducted using the integrated circuit CA3080 and operational amplifier LF‐356.
dc.identifier.doi10.4218/etrij.2023-0009
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/12468
dc.subjectRealization (probability)
dc.subjectBiasing
dc.subjectEquivalent series inductance
dc.subjectSpice
dc.subject.classificationRadio Frequency Integrated Circuit Design
dc.titleElectronically tunable compact inductance simulator with experimental verification
dc.typeArticle

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