A crossbar switch circuit design for reconfigurable wave-pipelined circuits

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dc.contributor.authorSato, Tomoaki
dc.contributor.authorChivapreecha, Sorawat
dc.contributor.authorMoungnoul, Phichet
dc.date.accessioned2026-08-06T10:08:13Z
dc.date.available2026-08-06T10:08:13Z
dc.date.issued2014-01-01
dc.description.abstractThis paper states crossbar switches which are used for the efficient design in reconfigurable wave-pipelined circuits. In the hardware- and host-based IPS (Intrusion Prevention System) which is used in mobile computing, reconfigurable circuits for intrusion detecting are implemented and their design requires techniques for highspeed and low-power operations. Wave-pipeline is a technique for realizing them. On the other hand, using it makes a problem that consumes a large amount of logic block in a conventional FPGA (Field-Programmable Gate Array). To solve this problem, the authors have developed a logic block for wave-pipelining. However, a crossbar switch for controlling the logic blocks to be used has not been developed. In this paper, the crossbar switches are developed in RTL (Register Transfer Level) and delay times, area and power are calculated.
dc.identifier.citationWmsci 2014 18th World Multi Conference on Systemics Cybernetics and Informatics Proceedings, 2, 200-205, 2014
dc.identifier.other2-s2.0-84923333687
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/5318
dc.sourceWmsci 2014 18th World Multi Conference on Systemics Cybernetics and Informatics Proceedings
dc.subjectCrossbar Switch
dc.subjectFPGA
dc.subjectIPS
dc.subjectReconfigurable Circuit
dc.subjectWave-Pipeline
dc.titleA crossbar switch circuit design for reconfigurable wave-pipelined circuits
dc.typeConference Paper

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