A 1-V, 330-nW, 6-Bit Current-Mode Logarithmic Cyclic ADC for ISFET-Based $$p\!H$$ p H Digital Readout System
| dc.contributor.author | Apinunt Thanachayanont | |
| dc.date.accessioned | 2025-07-21T05:55:22Z | |
| dc.date.issued | 2014-10-25 | |
| dc.identifier.doi | 10.1007/s00034-014-9908-0 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/4847 | |
| dc.subject | Subthreshold conduction | |
| dc.subject | Integral nonlinearity | |
| dc.subject | Successive approximation ADC | |
| dc.subject | Linearity | |
| dc.subject.classification | Analog and Mixed-Signal Circuit Design | |
| dc.title | A 1-V, 330-nW, 6-Bit Current-Mode Logarithmic Cyclic ADC for ISFET-Based $$p\!H$$ p H Digital Readout System | |
| dc.type | Article |