Automatic layout recycling based on layout description and linear programming

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dc.contributor.authorY. Shigehiro
dc.contributor.authorT. Nagata
dc.contributor.authorI. Shirakawa
dc.contributor.authorI. Arungsrisangchai
dc.contributor.authorH. Takahashi
dc.date.accessioned2025-07-21T05:46:50Z
dc.date.issued1996-01-01
dc.identifier.doi10.1109/43.511575
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/98
dc.subjectIC layout editor
dc.subjectPage layout
dc.subjectGraph Layout
dc.subjectStandard cell
dc.subjectIntegrated circuit layout
dc.subjectDesign layout record
dc.subject.classificationManufacturing Process and Optimization
dc.titleAutomatic layout recycling based on layout description and linear programming
dc.typeArticle

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