Low-voltage current-mode preamplifier based Latch comparator

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dc.contributor.authorJankatkit, Thongchai
dc.contributor.authorKasemsuwan, Varakorn
dc.date.accessioned2026-08-06T10:14:19Z
dc.date.available2026-08-06T10:14:19Z
dc.date.issued2016-09-06
dc.description.abstractThis paper presents a low-voltage latch current comparator. The circuit was designed on the basis of current mirror, preamplifier and latch circuits and also various circuit techniques; quasi-floating gate to reduce the input impedance, bulk driven technique for the circuit to be operable under low supply voltage and positive feedback to increase the gain and the overall speed. From the simulation results, which were presented with 0.18 um CMOS technology, the circuit can operate well at the supply voltage of 0.5 volt and the resulting propagation delay time were 2.2 nS and 1.4 nS when the input current differences are 1 uA and 10 uA, respectively. The total power dissipation was 79 uW.
dc.identifier.citation2016 13th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2016, 2016
dc.identifier.doi10.1109/ECTICon.2016.7561254
dc.identifier.other2-s2.0-84988811220
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/7008
dc.source2016 13th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2016
dc.subjectcurrent comparator
dc.subjectdynamic latch comparator
dc.subjectlow voltage
dc.titleLow-voltage current-mode preamplifier based Latch comparator
dc.typeConference Paper

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