Fabrication of MEMS-based capacitive silicon microphone structure with staircase contour cavity using multi-film thickness mask
| dc.contributor.author | Jantawong, Jirawat | |
| dc.contributor.author | Atthi, Nithi | |
| dc.contributor.author | Leepattarapongpan, Chana | |
| dc.contributor.author | Srisuwan, Awirut | |
| dc.contributor.author | Jeamsaksiri, Wutthinan | |
| dc.contributor.author | Sooriakumar, Kathirgamasundaram | |
| dc.contributor.author | Austin, Anu | |
| dc.contributor.author | Niemcharoen, Surasak | |
| dc.date.accessioned | 2026-08-06T10:24:05Z | |
| dc.date.available | 2026-08-06T10:24:05Z | |
| dc.date.issued | 2019-02-01 | |
| dc.description.abstract | In this work, a silicon capacitive microphone structure with a three-dimensional staircase style contour cavity (S-CTC) is developed using a newly developed Multi Film Thickness photo lithography process. This newly developed Multi Film masking process overrides the conventional wisdom in which the staircase style cavity is formed using multiple exposures of mask and multiple etchings of silicon. With this newly developed photo lithographic technique, a Multi Film Thickness (MFT) mask is fabricated with varying chromium film thicknesses such as 0, 4, 14, and 114 nm thick. The mask was then evaluated to fabricate a microphone structure with a three-dimensional staircase style cavity. Once the mask was patterned onto a substrate, a single dry etching of silicon was carried out and a desired three-dimensional stair cavity pattern was achieved. Surprisingly, our results show that a capacitive sensor with an S-CTC structure has an increased absolute capacitance value by an average of 30% in comparison to a conventional box cavity (BC) structure. This may indeed improve SNR as we anticipated. The capacitance value changed from 2.2pf to 2.9pf for the same dimension of devices. This promising technology renders an opportunity to improve the next generation of ultra-low-pressure sensors for microphone applications. | |
| dc.identifier.citation | Microelectronic Engineering, 206, 17-24, 2019 | |
| dc.identifier.doi | 10.1016/j.mee.2018.12.004 | |
| dc.identifier.issn | 01679317 | |
| dc.identifier.other | 2-s2.0-85059801602 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/9731 | |
| dc.source | Microelectronic Engineering | |
| dc.subject | 3D lithography | |
| dc.subject | Contour cavity | |
| dc.subject | MEMS capacitive | |
| dc.subject | Multi-film thickness mask | |
| dc.subject | Silicon microphone | |
| dc.title | Fabrication of MEMS-based capacitive silicon microphone structure with staircase contour cavity using multi-film thickness mask | |
| dc.type | Article |
