A 1.2 v low-power true single-phase clock CMOS 2/3 prescalers
| dc.contributor.author | Tooprakai, Siraphop | |
| dc.contributor.author | Tudsorn, Apirak | |
| dc.date.accessioned | 2026-08-06T10:10:08Z | |
| dc.date.available | 2026-08-06T10:10:08Z | |
| dc.date.issued | 2014-11-05 | |
| dc.description.abstract | This paper presents a low-power true single-phase clock 2/3 prescalers at 1.2 V supply voltage. The true single-phase clock divider was developed to help achieve low power and highspeed. All simulation results have been carried out by using Hspice program simulator based on 0.13μm CMOS technology. The power consumption of the proposed circuit is less than that of the previous circuits. The prescaler is capable of operating from 0.5 to 9.7 GHz. | |
| dc.identifier.citation | Proceedings 2014 International Conference on Information Science Electronics and Electrical Engineering Iseee 2014, 3, 1691-1694, 2014 | |
| dc.identifier.doi | 10.1109/InfoSEEE.2014.6946210 | |
| dc.identifier.other | 2-s2.0-84913551519 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/5857 | |
| dc.source | Proceedings 2014 International Conference on Information Science Electronics and Electrical Engineering Iseee 2014 | |
| dc.subject | 2/3 prescalers | |
| dc.subject | divider | |
| dc.subject | low power | |
| dc.subject | true single phase clock (TSPC) | |
| dc.title | A 1.2 v low-power true single-phase clock CMOS 2/3 prescalers | |
| dc.type | Conference Paper |
