Slew rate induced distortion in switched-resistor integrators

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dc.contributor.authorJiraseree-amornkun, A.
dc.contributor.authorWorapishet, A.
dc.contributor.authorKlumperink, E. A.M.
dc.contributor.authorNauta, B.
dc.contributor.authorSurakampontorn, W.
dc.date.accessioned2026-08-06T09:54:48Z
dc.date.available2026-08-06T09:54:48Z
dc.date.issued2006-12-01
dc.description.abstractOPAMP-RC integrators built with linear resistors and capacitors can achieve very high linearity. By means of a switched resistor, tuning of the RC time-constant is possible via the duty-cycle of the clock controlling the switched resistor. This paper analyzes the effect of OPAMP slew rate limitations on the distortion of a switched-resistor lossy OPAMP-RC integrator. We show via analysis and simulations that the use of two sets of switched resistors instead of one relaxes the OPAMP slew rate requirements, and reduces the resulting distortion significantly. ©2006 IEEE.
dc.identifier.citationProceedings IEEE International Symposium on Circuits and Systems, 2485-2488, 2006
dc.identifier.issn02714310
dc.identifier.other2-s2.0-34547245508
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/1491
dc.sourceProceedings IEEE International Symposium on Circuits and Systems
dc.titleSlew rate induced distortion in switched-resistor integrators
dc.typeConference Paper

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