A FPGA-based deep packet inspection engine for Network Intrusion Detection System

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dc.contributor.authorTran Ngoc Thinh
dc.contributor.authorTran Trung Hieu
dc.contributor.authorNone Van Quoc Dung
dc.contributor.authorSurin Kittitornkun
dc.date.accessioned2025-07-21T05:52:54Z
dc.date.issued2012-05-01
dc.identifier.doi10.1109/ecticon.2012.6254301
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/3440
dc.subjectGigabit
dc.subjectSignature (topology)
dc.subjectNetwork processor
dc.subject.classificationNetwork Packet Processing and Optimization
dc.titleA FPGA-based deep packet inspection engine for Network Intrusion Detection System
dc.typeArticle

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