A CMOS log-antilog current multiplier/divider circuit using DDCC

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dc.contributor.authorUsa Torteanchai
dc.contributor.authorMontree Kumngern
dc.contributor.authorKobchai Dejhan
dc.date.accessioned2025-07-21T05:52:23Z
dc.date.issued2011-11-01
dc.identifier.doi10.1109/tencon.2011.6129184
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/3145
dc.subjectCurrent divider
dc.subjectCurrent conveyor
dc.subject.classificationAnalog and Mixed-Signal Circuit Design
dc.titleA CMOS log-antilog current multiplier/divider circuit using DDCC
dc.typeArticle

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