Development of a Phase-Locked Loop Circuit in Running Frequency Mode for Capacitance-to-Voltage Conversion

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dc.contributor.authorTada On-khong
dc.contributor.authorNoppadon Sisuk
dc.contributor.authorParamote Wardkein
dc.contributor.authorRatchanoo Katman
dc.contributor.authorKriangsak Prompak
dc.date.accessioned2025-07-21T06:12:44Z
dc.date.issued2025-03-05
dc.identifier.doi10.1109/ieecon64081.2025.10987691
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/14305
dc.subjectFrequency Conversion
dc.subjectMode (computer interface)
dc.subjectParasitic capacitance
dc.subject.classificationAdvancements in PLL and VCO Technologies
dc.titleDevelopment of a Phase-Locked Loop Circuit in Running Frequency Mode for Capacitance-to-Voltage Conversion
dc.typeArticle

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