Extraction of BSIM3V3 junction capacitance model of nMOSFET in VLSI: Devices,circuits and systems - Ruangphanit, A.; Pedlub, R.; Muanghlua, R. (My University, 2018)
An extraction methodology and modeling of BSIM3v3 junction capacitance of NMOSFET in VLSI is proposed. In this paper, the extraction can lead to an improved accuracy on p-n junction capacitance. This methodology can extract parasitic capacitance due to bottom area junction and side-wall capacitance components at the field oxide side and gate oxide side. The capacitance model parameters in BSIM3v3 are proposed also. The manual calculation was used for the extraction methodology. A comparison is made to checking the accuracy of the capacitance models. The results show that a good agreement was found.
Keywords: BSIM3v3; Junction capacitance; NMOSFET