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    Item type:Publication,
    A 0.3 V Current Differencing Buffered Amplifier and Its Application in Current-Mode Third-Order Low-Pass Filters
    (2025-05-01)
    Khateb, Fabian
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    ;
    Kulej, Tomasz
    This paper introduces an innovative low-voltage, low-power current differencing buffered amplifier (CDBA). The proposed CDBA utilizes a bulk-driven MOS transistor operating in the subthreshold region, allowing it to function effectively at low supply voltages while minimizing power consumption, making it suitable for sensor and biomedical applications. To demonstrate the performance of the proposed CDBA, it is incorporated into the design of a current-mode, third-order low-pass filter that is specifically tailored for bio-sensing applications. Both the CDBA and the low-pass filter are designed and simulated in Cadence Virtuoso using the TSMC 0.18 µm CMOS process. The CDBA operates at a supply voltage of 0.3 V, consuming 170 nW of power, while the third-order low-pass filter achieves a dynamic range of 57.2 dB with a total harmonic distortion (THD) of 1%.
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    0.5-V High-Order Universal Filter for Bio-Signal Processing Applications
    (2025-04-01) ;
    Khateb, Fabian
    ;
    Kulej, Tomasz
    ;
    In this paper, a novel multiple-input operational transconductance amplifier (MI-OTA) is proposed. The MI-OTA can be obtained by using the multiple-input bulk-driven MOS transistor (MIBD MOST) technique. The circuit structure is simple, can operate with a supply voltage of 0.5 V, and consumes 937 pW at a current setting of 625 pA. The proposed MI-OTA was used to implement a high-order multiple-input voltage-mode universal filter. The proposed filter can provide non-inverting and inverting low-pass, high-pass, band-pass, band-stop, and all-pass transfer functions to the same topology. In addition, it has a high input impedance and does not need any inverted input signals, so there is no additional buffering circuit. The proposed filter can be used for biological signal processing. The proposed MI-OTA and the second-order universal filter were simulated in Cadence using CMOS process parameters of 0.18 μm from TSMC to verify the functionality and performance of the new structures.
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    Item type:Publication,
    0.3V bulk-driven current conveyor
    (2019-01-01)
    Khateb, Fabian
    ;
    Kulej, Tomasz
    ;
    This paper presents the design and the experimental results of a sub 0.5 V bulk-driven (BD) current conveyor (CCII) using 0.18μm TSMC CMOS technology with a total chip area of 0.0134 mm<sup>2</sup>. All transistors are biased in the subthreshold region for low-voltage low-power operation and the input transistors are controlled from their bulk terminals for rail-to-rail input voltage range. The circuit is designed to work with voltage supply (V<inf>DD</inf> = 0.3V), which is much lower than the threshold voltage of the MOS transistor (V<inf>TH</inf> = 0.5V) while consuming 19 nW of power. The measurement results confirm the proper function of the proposed circuit.
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    Item type:Publication,
    0.5-V bulk-driven fully differential current conveyor
    (2015-01-14) ;
    Khateb, Fabian
    This paper presents a new low-voltage supply and low-power consumption bulk-driven fully differential current conveyor (BD-FDCCII) which is suitable for low-voltage signal processing applications. The bulk-driven MOS technique is used to achieve a low-voltage supply as low as a 0.5V, also, a rail-to-rail input voltage swing. As an example application, a voltage-mode biquadratic filter using BD-FDCCII is presented. The proposed BD-FDCCII is simulated by PSPICE simulators using TSMC 0.18 μm n-well CMOS technology.
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    Item type:Publication,
    Differential second-generation current conveyor for ultra-low voltage applications
    (2014-01-01) ;
    Khateb, Fabian
    This paper presents an ultra-low voltage and -low power differential current conveyor which is suitable for low-voltage supply and low-power consumption signal processing circuit applications. The bulk-driven technique is used to provide a low-voltage supply as low as ±0.25 V and a rail-to-rail input voltage swing. The quasi-floating gate technique is also used to achieve the frequency performance of the proposed circuit. © 2014 IEEE.