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Optimizing MultiStack parallel (MSP) sorting algorithm
(2021-06-02)
Rattanatranurak, Apisit
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Kittitornkun, Surin
Mobile smartphones/laptops are becoming much more powerful in terms of core count and memory capacity. Demanding games and parallel applications/algorithms can hopefully take advantages of the hardware. Our parallel MSPSort algorithm is one of those examples. However, MSPSort can be optimized and fine tuned even further to achieve its highest capabilities. To evaluate the effectiveness of MSPSort, two Linux systems are quad core ARM Cortex-A72 and 24-core AMD ThreadRipper R9-2920. It has been demonstrated that MSPSort is comparable to the well-known parallel standard template library sorting functions, i.e. Balanced QuickSort and Multiway MergeSort in various aspects such as run time and memory requirements.
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A Parallel Multi-Deque Sorting Algorithm
(2021-01-01)
Kittitornkun, Surin
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Rattanatranurak, Apisit
Parallel or multithreaded sorting algorithms have been proposed and researched for multicore and manycore CPU and GPU systems. Some of them are based on divide and conquer concept to exploit data parallelism as well as task parallelism at the same time. In this paper, a Multi-Deque Sort (MDQSort) is proposed and developed on top of our previous algorithm called Multi-Stack (MSP) Sort. Therefore, the MDQSort can easily enhance the performance while getting rid of weaknesses of MSPSort. As a result, MDQSort can be as competitive as the Standard Template Library parallel mode sorting algorithms on a 4-core ARM Cortex A72 Linux system in terms of run time, stability, CPU utilization and memory (RAM) utilization.
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A MultiStack Parallel (MSP) partition algorithm applied to sorting
(2020-09-09)
Rattanatranurak, Apisit
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Kittitornkun, Surin
The CPUs of smartphones are becoming multicore with huge RAM and storage to support a variety of multimedia applications in the near future. A MultiStack Parallel (MSP) sorting algorithm is proposed and named MSPSort to support manycore systems. It can be regarded as many threads of single-pivot interleaving block-based Hoare’s algorithm. Each thread performs compare-swap operations between left and right (stacked and interleaved) data blocks. A number of multithreading features of OpenMP and our own optimization strategies have been utilized. To simulate those smartphones, MSPSort is fine tuned and tested on four Linux systems, e.g. Intel i7-2600, Xeon X5670, AMD R7-1700 and R9-2920. Their memory configurations can be classified as either uniform or non-uniform memory access. The statistical results are satisfied compared to parallel-mode sorting algorithms of Standard Template Library, namely Balanced QuickSort and MultiWay MergeSort. Moreover, MSPSort looks promising to be developed further to improve both run time and stability.
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A Parallel Triple-Pivot Sorting (PTPSort) Algorithm: Preliminary Results
(2020-06-01)
Rattanatranurak, Apisit
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Kittitornkun, Surin
Parallel or multithreaded sorting algorithms can be useful for data science/analytics and other applications for manycore CPU systems. A Parallel Triple Pivot Sort (PTPSort) is devised based on the Hoare's partition algorithm. The input array is initially partitioned with two pivots, PLo and PHi in parallel with two threads. Subsequently, the middle pivot, PMi, is applied resulting in approximately two halves. Finally, four subarrays can be obtained from two independent threads partitioning each leftover half with PLo and PHi, respectively. The process is recursively forked as threads until the subarray is shorter than a cutoff threshold and then STLSorted in parallel. However, its preliminary execution time is a bit longer than that of our benchmark, a parallel original Hoare's algorithm, on a 24-thread AMD ThreadRipper 2920x Linux system.
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Scheduling algorithms for the revised pdpsort
(2019-07-01)
Rattanatranurak, Apisit
;
Kittitornkun, Surin
Parallel sorting algorithms for manycore CPU systems are needed in data science and big data era. The PDPSort (Parallel Dual Pivot STLSort) can be revised and extended to achieve higher and more stable Speedups. This paper experiments four scheduling algorithms, Always Left (LAL), Always Right (RAL), Longer Partition First (LPF) and Shorter Partition First (SPF). Eventually, the revised PDPSort can achieve faster Speedup by upto 7.35×, 4.83× and 4.43× over the STLSort on AMD R7-1700, AMD FX-8320, and Intel i7-2600 Linux systems, respectively. Moreover, the LPF algorithm yields more stable Speedup's than others.
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Analysing and optimizing snphap using radix-2 computation and openmp
(2013-07-12)
Ranokphanuwat, Ratthaslip
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Rattanatranurak, Apisit
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Kittitornkun, Surin
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Tongsima, Sissades
In this paper, the run time complexity of SNPHAP, which is a haplotype inference tool, is extensively examined. The analysis is based on our previous work in terms of profiling and run-time complexity function. To reduce the run time complexity and enhance its performance, a Radix-2 computation and OpenMP multithreading are applied. The optimized results are compared with both original and compiler optimized versions on an AMD A6-3650 Linux machine. Due to the Radix-2 technique, the complexity is drastically reduced. In addition, the theoretical Speedup is consistent with the experimental one. Furthermore, up to 1,303% Speedup is achievable as a result of OpenMP multithreading.
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Optimizing and multithreading SNPHAP on a multi-core APU with OpenCL
(2012-09-24)
Rattanatranurak, Apisit
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Kittitornkun, Surin
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Tongsima, Sissades
In this paper, we have optimized and multithreaded SNPHAP, a bioinformatics program, with OpenCL to reduce the computation time and thus accelerate the execution. Our method is called Radix Comparison algorithm running in sequential and parallel (multithreading). Based on the recent multi-core AMD A6-3650 APU (Accelerated Processing Unit), the achieveable Speedups of Sequential Radix and Parallel Radix SNPHAP compared with the original SNPHAP are 260% and 271%, respectively. © 2012 IEEE.

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