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    Item type:Publication,
    Development of High Efficient LDPC Encoder for Deep Space Applications
    (2023-01-01)
    Srisupha, Thanat
    ;
    Wongsa, Anusorn
    ;
    Duangthong, Chatuporn
    ;
    Phakphisut, Watid
    In this paper, we present the design and implementation of a high efficient low-density parity-check (LDPC) encoder for deep space applications. The proposed encoder utilizes the generator matrix of CCSDS LDPC codes to simplify the encoding process and reduces the complexity of hardware implementation. The proposed encoder has two types. The first type aims to design a low-complexity architecture and flexibility. The second type presents high throughput architecture, allowing the user to choose the appropriate type according to their usage condition. The results of FPGA synthesis show that the proposed LDPC encoders achieve flexibility, low complexity, and high throughput.
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    Item type:Publication,
    Development of 5G LDPC Experimental Kit
    (2022-01-01)
    Srisupha, Thanat
    ;
    Mueadkhunthod, Krittiyaporn
    ;
    Phakphisut, Watid
    ;
    Khittiwitchayakul, Sirawit
    ;
    Puntsri, Kidsanapong
    In this work, we develop the 5G LDPC experimental kit to demonstrate the encoding processes of LDPC codes in 5G new radio. The experimental kit consists of a graphical user interface (GUI) and an FPGA development board. Any parameters defined in the 5G new radio can be configured and their encoding results are presented in the GUI. We also develop the 5G LDPC encoder as the software module integrated within the GUI. The user can select the software or hardware for the 5G LDPC encoder. The experimental kit is simple to use and no need any complicated setups. We believe that the experimental kit would be useful to anyone interested in the LDPC 5G NR standard.