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Author: search.filters.author.Tipsuwanporn, V.Subject: search.filters.subject.FPGA

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    Application of three-level voltage inverter on FPGA chip for 3-phase induction motor
    (2009-12-01)
    Tipsuwanporn, V.
    ;
    Sawaengsinkasikit, W.
    ;
    Numsamran, A.
    ;
    Jaisue, R.
    This research is a design of three-level voltage inverter on FPGA chip for controlling 3-phase induction motor. SVM (Space Vector Modulation) signal is generated by using FPGA chip XC2S50-5tq-144 because it is programmable and has high frequency to generate switching signal, and also, has low price. Part of motor driving uses of Ic no.IR2130 three phase bridge driver which has overvoltage and short circuit protection system. With closer sinusoidal output voltage signal results to closer sinusoidal current signal is obtained. Lower harmonics of voltage and current results to higher motor control efficiency. For design of the 3 phase induction motor speed control signal, principle of voltage/frequency (V/f) ratio control is used which can control the motor speed to provide constant torque.
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    Design and implementation multilevel inverter for 3φ induction motor speed control with RBM chopper technique embedded on FPGA
    (2006-01-01)
    Tipsuwanporn, V.
    ;
    Keanthong, K.
    ;
    Charean, A.
    ;
    Runghimmawan, T.
    This paper introduces on designing of Regular-based Binary Multiplier: RBM signal embedded on Field Programmable Gate Array: FPGA, which control induction motor speed. Various form of 8-bit RBM signal are generated and choppered with the multi level -inverter output voltage whose switching angle is provided for determining amplitude of fundamental frequency and eliminating unrequired low-order harmonics. Objectives of this switching technique is improvement of the inverter output signal in term of total harmonic distortion voltage reduction (%THD) while controlling the motor. Such motor's efficiency and performance are improved while voltage to frequency ratio is maintained constantly for stable torque during control. © 2006 IEEE.
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    Fuzzy Logic PID controller based on FPGA for process control
    (2004-12-01)
    Tipsuwanporn, V.
    ;
    Runglimmawan, T.
    ;
    Intajag, S.
    ;
    Krongratana, V.
    In this paper, a fuzzy proportional integral derivative (PID) controller, which is fabricated on a Field Programmable Gate Array (FPGA). is proposed to conitrol an ilndustrial process. The fuzzy logic is provided to tune the PID parameters by using a gain scheduhng method. The tuning scheme is represented by a fuzzy svsten. which consists of fuzzification, rule inference and defuzzification. The fabricated FPGA chip, XC2S50-Stq-144. is embedded with the fuzzy system. which the chip is called fuzzv-PID controller. The fuzzy-PID controller is contained several circuits, such as multiplier, adder, subtraction and some of the otlher logic gate. The controller system uses two converter cards: TDA8763AM/3 (10 bits, high speed) to convert from analog to digital signal, DAC08 (8 bits) to convert from digital to analog. The maximum speed of the controller about 2.1 psec per action at 40.550 AIH.Z. is calculated from timing summary. The fuzzy-PID controller based on FPGA is verified by using to control model of level and temperature process. From the experimental results of the level and temperature control. the fuzzy-PID controller lhas achieved and shown the better performance than stanidard PID controller E50AK. which is automatic tuneable parameter system.©2004 IEEE.