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16-nW 0.5-V low-pass filter for bio-signal applications
(2025-01-01)
Phatsornsiri, Punnavich
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Kumngern, Montree
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Khateb, Fabian
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Torteanchai, Usa
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Wongprommoon, Natapong
A low-voltage, ultra-low power fully differential low-pass filter for bio-signal applications using multiple-input fully differential operational transconductance amplifiers (OTA) is presented in this article. The multiple inputs of OTA can be achieved using multiple-input dynamic threshold MOS transistor (MIDT-MOST) technique. The novelty of this work is to exhibit the proposed filter using multiple-input OTAs, which leads to a reduction in the number of active OTAs and power consumption. The fourth-order low-pass filter that is cascaded by two second-order filters has been presented. The fourth-order low-pass filter is designed and simulated in the Cadence environment using the 0.18 μm CMOS technology from TSMC at a supply voltage of 0.5 V. The simulation results show that the filter consumes 16 nW of power at a bandwidth of 110 Hz, has a total harmonic distortion (THD) of 1 % at 204.96 mV input amplitude, and provides dynamic range of 69.24 dB. These results indicate that the proposed low-pass filter can be applied to bio-signal processing applications.
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0.5-V 16 nW Low-Pass Filter for Bio-Signal Applications
(2024-01-01)
Phatsornsiri, Punnavich
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Kumngern, Montree
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Khateb, Fabian
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Kulej, Tomasz
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Wongprommoon, Natapong
This study presents a low-voltage, ultra-low power fully-differential low-pass filter for bio-signal applications using multiple-input fully differential operational transconductance amplifiers (MIFD OTA). This work shows that a low-pass filter using multiple-input OTA can reduce the number of OTAs and power consumption. The low-pass filter can be applied to biomedical signal processing applications. The low-pass filter was simulated using the 0.18 μm (CMOS) technology from TSMC with a supply voltage of 0.5 V. The simulation result shows that the filter has a static power consumption of 16 nW and a 140-Hz bandwidth when operating from a supply voltage of 0.5 V. Input frequency of 10 Hz with an amplitude of 220 mV, the new proposed filter provides a dynamic range of 72.2 dB, total harmonic distortion of 1 %.
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1.2 V differential difference current conveyor using MIGD MOST technique and its applications
(2023-01-01)
Kumngern, Montree
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Khateb, Fabian
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Phatsornsiri, Punnavich
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Jongchanachavawat, Wirote
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Kulej, Tomasz
This paper presents a new differential difference current conveyor (DDCC), realized using multiple-input gate-driven MOS transistor (MIGD MOST) technique. The application of MIGD MOST can reduce the number of differential pairs in the input stage of the DDCC, thus simplifying its overall structure. Unlike previous DDCC, the output stage of the circuit operates in super class-AB, that offers low static power consumption, high load driving capability and improved gain-bandwidth product (GBW).The proposed DDCC can work with the supply voltage of 1.2 V and consumes 44.2 μW of power. The proposed DDCC has been used to realize a versatile circuit that can work as a universal filter or a quadrature oscillator into a single topology. When the circuit works as a universal filter, it can realize low-pass, band-pass, high-pass, band-stop and all-pass voltage responses. The natural frequency and the quality factor of these responses can be orthogonally controlled. When the circuit works as a quadrature oscillator, the condition and the frequency of oscillators can be orthogonally controlled. The proposed MIGD DDCC and the proposed universal filter and quadrature oscillator have been simulated with SPICE, using 0.18 μm CMOS process parameters to prove the functionality and workability of the new circuits.
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Current-Mode Universal First-Order Analog Filter Using CCCIIs
(2023-01-01)
Phatsornsiri, Punnavich
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Torteanchai, Usa
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Wongprommoon, Natapong
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Kumngern, Montree
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Jongchanachavawat, Wirote
This paper presents a new current-mode first-order universal analog filter using current-controlled current conveyors (CCCIIs). The proposed circuit can realize first-order sections such as all-pass, low-pass, high-pass filters with both non-inverting and inverting transfer functions into single topology. The pole frequency of these filters can be controlled electronically. The output terminals possess high impedance level which is required for cascading of current-mode circuits. The proposed analog filter is verified using SPICE simulation. The CCCII has been simulated using the 0.18 µm CMOS technology with a supply voltage of 1.8 V. The simulation result can show that it agrees well with theory.
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Multiple-Input Multiple-Output Universal Filter Using DDTAs
(2022-01-01)
Suksaibul, Pichai
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Torteanchai, Usa
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Manman, Somsak
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Jongchanachavawat, Wirote
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Kumngern, Montree
This paper presents a multiple-input multiple-output universal biquadratic filter using differential difference transconductance amplifiers. The variant filtering responses can be obtained by appropriately applying input signals and appropriately choosing output terminals. The voltage-mode filter possesses both high-input and low-output impedances. The proposed filter provides five standard filtering responses. The natural frequency can be controlled electronically, and the quality factor can be controlled orthogonally. The performance of the proposed filter is confirmed using PSPICE simulation based on 0.18 µm CMOS technology from TSMC.
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Mixed-Mode Universal Filter Using Differential Difference Transconductance Amplifiers
(2022-01-01)
Suksaibul, Pichai
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Torteanchai, Usa
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Kumngern, Montree
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Jongchanachavawat, Wirote
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Burapattanasiri, Bancha
This paper presents a new mixed-mode universal biquad filter based on differential difference transconductance amplifiers (DDTAs). This work will be expressed that many filtering functions with electronic control of the natural frequency can be obtained using DDTA-based circuit. The topology provides voltage-mode (VM), current-mode (CM), transimpedance-mode (TIM), transadmittance-mode (TAM) transfer functions into single topology and each transfer function offers five standard filtering functions. The performance of the proposed topology is carried out using PSPICE simulators based on 0.18 μm CMOS technology from TSMC. The simulation result shows that it can confirm the proposed topology.
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1.2 v Differential Difference Current Conveyor Using MIGD MOST Technique
(2022-01-01)
Phatsornsiri, Punnavich
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Torteanchai, Usa
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Rattanasuttikan, Manurak
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Jongchanachavawat, Wirote
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Kumngern, Montree
This paper presents a new differential difference current conveyor (DDCC) using multiple-input gate-driven MOS transistor (MIGD MOST) technique. The MIGD MOST technique can be reduced the number of transistor differential pair. The differential input stage is implemented by flipped voltage follower to obtain low power supply requirements. Thus, the proposed DDCC is capable to working with a supply voltage of 1.2 V and it consumes a 44.2 μW of power dissipation. The simulations were performed with PSPICE using the 0.18 μm CMOS technology to prove the workability of the new circuit.
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0.3 v Fully Differential Current Conveyor Using MIBD-DT MOST technique
(2022-01-01)
Kumngern, Montree
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Torteanchai, Usa
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Wongprommoon, Natapong
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Jongchanachavawat, Wirote
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Tooprakai, Siraphop
This paper presents a new fully differential second-generation current conveyor (FDCCII) using multiple-input bulk-driven dynamic threshold voltage MOS transistor (MIBD-DT MOST) technique. This FDCCII, the MOST techniques such as the multiple-input (MI), bulk-driven (BD) and dynamic threshold voltage (DT) have been used. The MIBD can be reduced the number of differential pair of FDCCII and the DT-MOST technique can be reduced the power supply requirement. Thus, the proposed FDCCII is capable to working with a supply voltage of 0.3 V and it consumes a 0.132 uW of power dissipation. The simulations were performed with SPICE program using the 0.18 um CMOS technology. To prove the workability of the new circuit, the proposed FDCCII has been used to realize universal filter.
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Extremely Low-Power Fifth-Order Low-Pass Butterworth Filter
(2021-04-01)
Aupithak, Nattharinee
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Torteanchai, Usa
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Burapattanasiri, Bancha
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Lerkvaranyu, Somkiat
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Khateb, Fabian
A fifth-order Butterworth low-pass filter using multiple-input operational transconductance amplifiers (OTAs) is proposed in this paper. It is expressed that the number of OTAs that used for realizing fifth-order low-pass filter can be reduced using multiple-input OTA and results to decrease the power consumption and the active area. N-input OTA can be obtained using multiple-input bulk-driven quasi-floating gate technique. Subthreshold technique is used to achieve extremely low power consumption which can be applied to biomedical systems. The proposed topology is simulated using 0.18 standard CMOS process. Simulation results show that the proposed filter has a bandwidth located within 250 Hz, a power consumption of 41 nW and a dynamic range of 61 dB.
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Electronically Tunable Differential Difference Current Conveyor Using OTAs
(2021-04-01)
Sukhawit, Chuthitep
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Burapattanasiri, Bancha
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Torteanchai, Usa
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Lerkvaranyu, Somkiat
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Knobnob, Boonying
This paper presents a new electronically tunable differential difference current conveyor (DDCC) using operational transconductance amplifiers (OTAs). Unlike conventional DDCC, the proposed DDCC offers current gain between z- and x-terminal that can be controlled electronically by bias currents. The DDCC-based OTA can be investigated both simulation and experiment tests. The proposed DDCC is used to implement a quadrature oscillator to confirm workability.

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