1.2 v Differential Difference Current Conveyor Using MIGD MOST Technique

This paper presents a new differential difference current conveyor (DDCC) using multiple-input gate-driven MOS transistor (MIGD MOST) technique. The MIGD MOST technique can be reduced the number of transistor differential pair. The differential input stage is implemented by flipped voltage follower to obtain low power supply requirements. Thus, the proposed DDCC is capable to working with a supply voltage of 1.2 V and it consumes a 44.2 μW of power dissipation. The simulations were performed with PSPICE using the 0.18 μm CMOS technology to prove the workability of the new circuit.