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Design of a low-power wide dynamic range CMOS RF power detector
(2015-10-02)
Thanachayanont, A.
This article describes the design and implementation of a low-power wide dynamic range radio-frequency power detector in a standard 0.18-µm complementary metal-oxide-semiconductor process. The proposed circuit includes a root-mean-square (RMS) power detector and a logarithmic amplifier. The RMS power detector exploits the non-linear characteristic of metal-oxide-semiconductor field-effect transistor to realise the RMS conversion. Since the output of the RMS power detector is a DC voltage, the following logarithmic amplifier does not require wide operating bandwidth, thus allowing simple circuit realisation with minimum power dissipation. Simple differential amplifier is used to realise the limiting gain stage. Post-layout simulation results showed that the proposed circuit was able to detect input power from −70 dBm to −20 dBm, with signal frequencies ranging from 0.5 GHz to 3.0 GHz, while dissipating 0.9 mW under a 1.8-V power supply voltage.
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The effects of solvents on the properties of ultra-thin poly (methyl methacrylate) films prepared by spin coating
(2013-11-01)
Tippo, T.
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Thanachayanont, C.
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Muthitamongkol, P.
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Junin, C.
;
Hietschold, M.
Poly (methyl methacrylate) (PMMA) is extensively used as an insulating layer in organic electronic devices. In this study, spin coating method was used to cast thin layers of PMMA for dielectric application from solutions in three different solvents, namely dimethylformamide (DMF), n-butyl acetate and toluene. The solvent's vapor pressure causes the solvent to vaporize at different rates leading to layer's distortion and different surface roughnesses. Preparation of suitable surface morphologies, for example, pinhole-free and crack-freewas studied. A step profilometer was used to measure the film thicknesses. Alternatively an equation correlating final film thickness to spin speed and solution concentration was proposed. A metal/insulator/metal parallel plate capacitor structurewas fabricated and the current density dependence on the applied electric fieldwas measured. The resulting low surface roughness, low leakage currents, high breakdown voltage, and high dielectric constant were obtained for the 100 nm-thick PMMA film prepared with DMF. © 2013 Elsevier B.V.
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Sub 1-V highly-linear low-power class-AB bulk-driven tunable CMOS transconductor
(2013-06-01)
Yodtean, A.
;
Thanachayanont, A.
This paper describes the design and realization of a sub 1-V low power class-AB bulk-driven tunable linear transconductor using a 0.18-μm CMOS technology. The proposed transconductor employs a class-AB bulk-driven differential input voltage follower and a passive resistor to achieve highly linear voltage-to-current conversion. Transconductance tuning is achieved by tuning the differential output current of the core transconductor with gain-adjustable current mirrors. With 10.4-μA current consumption from a 0.8-V single power supply voltage, simulation results show that the proposed transconductor achieves the total harmonic distortion (THD) of <-40 dB for a peak differential input voltage range of 800 mV at frequencies up to 10 kHz. The simulated input-referred noise voltage integrated over 10-kHz bandwidth is 100 μV, resulting to an input signal dynamic range of 75 dB for THD <-40 dB. A biquadratic G<inf>m</inf>-C filter is designed to demonstrated the performance of the proposed transconductor. At the nominal 10-kHz cut-off frequency, the filter dissipates 34.4 μW from a 0.8-V supply voltage and it achieves an input signal dynamic range of 67.4 dB for the third-order intermodulation distortion of <-40 dB. © 2013 Springer Science+Business Media New York.
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Low-power current-mode logarithmic pipeline analog-to-digital converter for ISFET based pH sensor
(2009-12-01)
Sirimasakul, S.
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Thanachayanont, A.
;
Jeamsaksiri, W.
This paper describes the design and realization of a low power current-mode logarithmic pipeline analog-to-digital converter in 0.35μm CMOS technology. The ADC is intended for conversion of sub-microampere analog output current of an ISFET based pH sensor. Subthreshold MOSFETs and the Translinear principle are exploited to achieve simple and low-power ADC realization. The ADC was simulated with a 1-V power supply voltage and dissipated 3.3 μW static power at 1-kHz clock frequency. ©2009 IEEE.
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A wideband CMOS variable gain amplifier using active feedback and resistive compensation
(2009-12-01)
Sakprom, S.
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Thanachayanont, A.
;
Khumsat, P.
This paper describes the design and realization of a low power low voltage variable gain amplifier based on an active feedback topology. The proposed amplifier employs the active feedback topology with resistive compensation technique to enhance the operating bandwidth. Simulation results using a 0.18um CMOS technology show that the proposed amplifier can achieve 3.3 GHz bandwidth and 56 dB gain, while drawing 24 mA from a single 1.8-V power supply voltage. ©2009 IEEE.
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A 2.4-GHz 43-dB CMOS logarithmic amplifier for RF signal level detection
(2008-10-06)
Wongnamkam, S.
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Thanachayanont, A.
;
Krairiksh, M.
This paper describes the design and implementation of a 2.4-GHz fully-differential logarithmic amplifier for RF signal power detection. A novel self-bias wideband amplifier without on-chip inductor is employed as a limiting amplifier stage. The proposed logarithmic amplifier is realized and fabricated in a 0.35-μm CMOS technology. Measurement results showed that the circuit achieved 43-dB voltage gain, while drawing 73.5 mA from a single 2.5-V power supply voltage. © 2008 IEEE.
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Fabrication and modeling of organic thin-film transistor on glass substrate
(2008-10-06)
Tippo, T.
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Thanachayanont, C.
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Sahasithiwat, S.
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Thanachayanont, A.
Organic thin film transistors have been fabricated using pentacene as an active material. Aluminium gate electrodes, pentacene active layers and gold source-drain contacts were fabricated on glass substrate using thermal evaporation though metallic mask. Gate dielectric layers were processed by solution-process spin-coating. The fabricated transistor exhibited the maximum carrier mobility of 0.01 cm<sup>2</sup>/V-s and the on/off current current ratio over 400. © 2008 IEEE.
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1.5-V 900-μW 40-dB CMOS variable gain amplifier
(2006-12-01)
Naktongkul, P.
;
Thanachayanont, A.
This paper describes the design and implementation of a low-voltage high-frequency variable gain amplifier in a 0.35-μm CMOS technology. The proposed circuit employs source degeneration and current feedback techniques to achieve high linearity and wide bandwidth. Experimental results show that the overall amplifier (including output voltage buffer) has a linear-in-dB controllable gain range of 40-dB with more than 10-MHz bandwidth, while draining 600 μA from a 1.5-V power supply voltage. © 2006 IEEE.
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Low-voltage wideband compact CMOS variable gain amplifier
(2005-01-20)
Thanachayanont, A.
;
Naktongkul, P.
A novel low-voltage wideband CMOS variable gain amplifier (VGA) is proposed. Using a 0.13 μm CMOS technology, the VGA exhibits a linear-dB controllable gain range of 40 dB with a bandwidth in excess of 130 MHz, while drawing only 50 μA from a single 1 V power supply voltage.
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Low-voltage, rail-to-rail, Gm-enhanced pseudo-differential class-AB OTA
(2004-12-01)
Thanachayanont, A.
;
Chaloenlarp, W.
This paper presents a new class-AB pseudo-differential operational transconductance amplifier (OTA) for low-voltage and high-speed switched-capacitor circuits. The proposed OTA employs partial positive feedback to enhance the input transconductance, thus increasing the open-loop DC gain and the unity-gain frequency. A push-pull configuration is used to obtain rail-to-rail output voltage swing. Using a 0.35-μm digital CMOS process, the proposed OTA can obtain 78-dB DC gain, 72.5° phase margin, 100-V/μs slew rate with 1-pF load capacitor, while draining 170-μA quiescent supply current from a single 1-V power supply voltage.

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