Kongpoon, Metha
Loading...
3 results
Now showing 1 - 3 of 3
- Some of the metrics are blocked by yourconsent settings
Item type:Publication, A DTMOS-based temperature sensor with an inaccuracy of ±0.25°C (3σ) from -20°C to 85°C(2023-01-01); Thanachayanont, ApinuntThis paper describes the design of a low-power temperature sensor in a 0.18-μm CMOS technology. The proposed temperature sensor employs the so-called 'dynamic threshold MOS (DTMOS)"diode-connected transistors as the temperature sensing devices. Process spread of the MOSFET threshold voltage is compensated by using the 2-transistor (2T) voltage reference to generate the bias current sources. A charge-balancing delta-sigma $(\Delta \Sigma)$ analog-to-digital converter (ADC) is used to obtain the digital representation of temperature values. The DTMOS temperature sensor core and the ADC operate with 1 V power supply voltages. The ADC operates with a 64- kHz clock frequency and each temperature conversion time is 32ms. After a single-point temperature trimming and a linear fit, the proposed circuit achieves a maximum inaccuracy of ±0.25°C (3σ) across all process corners and the temperature range of -20°C to 85°C, while consuming 8.1 μW. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Eliminable-Noise Dithering in MASH Digital Delta-Sigma Modulator Based on Error-Feedback Modulator(2025-06-01); Achanapornkul, SuphomConventional LFSR-based dithering in the digital delta-sigma modulator (DDSM) is widely used to suppress spurious tones in the DDSM at the expense of the increased modulator’s noise floor. In this work, we present a new dithering technique using the error feedback modulator (EFM) that can both suppress spurious tones and eliminate the dithering noise. The proposed technique also offers the precise frequencytuning ability beneficial for fractional-N frequency synthesizers. Moreover, the hardware complexity of the DDSM using the proposed dithering technique can be reduced significantly with multistage dithering and a short wordlength. Mathematic proof and simulation results have been given to show that the proposed technique efficiently suppress spurious tones without raising the low-frequency noise floor. The proposed technique shows the improved performance compared to previously reported spur reduction techniques. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Modular Class-AB Current Multiplier Based on Fully-Differential Hyperbolic Transconductor(2021-05-26)This paper presents a new class-AB current multiplier using fully differential hyperbolic sine transconductors based on floating-gate transistors. The proposed multiplier is developed from a hyperbolic sine multiplication identity which inherently provides a class-AB operation. The proposed multiplier was designed using 0.35 μm AMS CMOS process. Simulation results show that the proposed multiplier achieves -30 dB THD for high input modulation index of 23 while utilizing power consumption of 60 nW under a supply voltage of 3 V.