Jaikla, Winai
Loading...
Preferred name
Jaikla, Winai
Alternative Name
Jaikla, W.
Main Affiliation
Email
winai.ja@kmitl.ac.th
24 results
Now showing 1 - 10 of 24
- Some of the metrics are blocked by yourconsent settings
Item type:Publication, Single commercially available ic-based electronically controllable voltage-mode first-order multifunction filter with complete standard functions and low output impedance(2021-11-01); ;Buakhong, Unchittha; ;Khateb, FabianSotner, RomanThis paper presents the design of a voltage-mode three-input single-output multifunction first-order filter employing commercially available LT1228 IC for easy verification of the proposed circuit by laboratory measurements. The proposed filter is very simple, consisting of a single LT1228 as an active device with two resistors and one capacitor. The output voltage node is low impedance, resulting in an easy cascade-ability with other voltage-mode configurations. The proposed filter provides four filter responses: low-pass filter (LP), high-pass filter (HP), inverting all-pass filter (AP−), and non-inverting all-pass filter (AP+) in the same circuit configuration. The selection of output filter responses can be conducted without additional inverting or double gains, which is easy to be controlled by the digital method. The control of pole frequency and phase response can be conducted electronically through the bias current (I<inf>B</inf>). The matching condition during tuning the phase response with constant voltage gain is not required. Moreover, the pass-band voltage gain of the LP and HP functions can be controlled by adjusting the value of resistors without affecting the pole frequency and phase response. Additionally, the phase responses of the AP filters can be selected as both lagging or leading phase responses. The parasitic effects on the filtering performances were also analyzed and studied. The performances of the proposed filter were simulated and experimented with a ±5 V voltage supply. For the AP+ experimental result, the leading phase response for 1 kHz to 1 MHz frequency changed from 180 to 0 degrees. For the AP− experimental result, the lagging phase response for 1 kHz to 1 MHz frequency changed from 0 to −180 degrees. The design of the quadrature oscillator based on the proposed first-order filter is also included as an application example. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Reconfigurable Voltage-Mode First-Order Multifunction Filter Employing Second-Generation Voltage Conveyor (VCII) With Complete Standard Functions and Electronically Controllable Modification(2023-01-01); ;Sangyaem, Surasak; ;Khateb, FabianMinaei, ShahramIn this contribution, the realization of a first-order, two-input, single-output voltage-mode multifunction filter employing a second-generation voltage conveyor (VCII) is described. The proposed first-order versatile filter is extremely simple, composed of a single VCII and three passive devices. Because of its low output impedance, the output voltage node can be easily cascaded with other voltage-mode configurations without the requirement of any buffers. In the same circuit topology, the proposed first-order filter provides various filtering functions: inverting and non-inverting low-pass (LPF), inverting and non-inverting high-pass (HPF), as well as inverting and non-inverting all-pass (APF). The digital method allows the selection of output first-order filtering functions without the need for additional circuits such as inverting or double-gain amplifiers. Furthermore, the pass-band gain of the low-pass and high-pass responses can be adjusted by varying the resistance or capacitance values without influencing the pole frequency as well as the phase response. The influence of VCII's current/voltage gain errors and parasitic elements on filtering performance is also investigated. Moreover, the modification of the proposed lagging phase all-pass filter to achieve electronic controllability is also proposed by replacing the passive resistor with the operational transconductance amplifier (OTA). The 0.18μm TSMC CMOS structure of the VCII employed in the proposed filter operates in the subthreshold region and utilizes the bulk-driven technique (BD), enabling it to operate with 0.4V supply voltage and consuming 383 nW of power. The total harmonic distortion (THD) of the LPF with an applied input voltage Vinpp=300 mV @ 50Hz is -49.5 dB. An application example as a quadrature sinusoidal oscillator realized from the proposed first-order allpass filter and lossless integrator is also included. The performance of the proposed reconfigurable voltage-mode first-order filter is simulated and experimentally tested using a commercially available AD844 IC-based VCII with ±5 V power supply. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Five-inputs single-output voltage mode universal filter with high input and low output impedance using VDDDAs(2017-01-01) ;Sangyaem, Surasak; ; Khateb, FabianThe design of analog filter using active building block has been gained significant attention and has become an interesting research topic. A five-inputs single −output voltage-mode universal biquadratic filter using active building block, namely voltage differencing differential difference amplifier (VDDDA) is presented in this paper. The proposed filter consists of two VDDDAs and two grounded capacitors. The presented circuit has high impedance for all input voltage nodes and low impedance for output voltage node which is ideal for cascade in voltage-mode circuit without the use of buffer circuits. It can provide five output voltage functions which are band-pass (BP), low-pass (LP), band-reject (BR), high-pass (HP) and all-pass (AP) responses. For high-pass and band-pass functions, the inverting and non-inverting response can be achieved. The matching condition, the inverting and double gain amplifier are not required which is easy to select the output response by digital method. The natural frequency and quality factor can be electronically tuned that is attractive for microcomputer or microcontroller controllability. To verify the validity of proposed filter, the PSPICE simulation and experimental results using VDDDA constructed from commercially available IC are included. The measured results agree well with theoretical expect. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Comparative performance study of multiple-input bulk-driven and multiple-input bulk-driven quasi-floating-gate DDCCs(2019-08-01) ;Khateb, Fabian ;Kulej, Tomasz; ; Ranjan, Rajeev KumarThis brief presents a comparative performance study of two recently presented techniques, the multiple-input bulk-driven (MI-BD) and the multiple-input bulk-driven quasi-floating-gate (MI-BD-QFG) MOS transistors (MOST). These techniques offer simplified CMOS structures of specific active elements and ensure near rail-to-rail operation capability under extremely low-voltage supply and reduced power consumption. However, to clarify the pros and cons of each technique, two Differential Difference Current Conveyors (DDCC) using MI-BD and MI-BD-QFG are compared. For the purpose of comparison, theoretical analysis such as small-signal model, open-loop gain, terminal resistances, gain bandwidth product, input referred thermal noise and maximum input range of the DDCCs are included. Furthermore, in order to provide a fair performance comparison both of the DDCCs is supplied with 0.4 V and consume same power 140 nW. The DDCCs were fabricated in a standard n-well 0.18 µm CMOS process from TSMC and hence the results are confirmed theoretically and experimentally. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A 0.5-V 95-dB rail-to-rail DDA for biosignal processing(2022-02-01) ;Khateb, Fabian ;Kulej, Tomasz; ;Arbet, DanielThis paper presents a new low-voltage CMOS structure for differential difference amplifier (DDA) optimized for low frequency biosignal processing. The DDA input stage is based on a non-tailed bulk-driven (BD) differential pair offering rail-to-rail input common mode range (ICMR) under 0.5 V voltage supply. Unlike the conventional two differential pairs DDA structure, the proposed one employs one differential pair created by the multiple-input MOS transistor (MI-MOST) technique offering simple circuitry. Although the bulk-driven and the MI-MOST techniques reduce the amplifier's transconductance, the gain is boosted by increasing the output resistance using a self-cascode transistor and a partial positive feedback. As a result, a 95-dB voltage gain is achieved which is larger than achieved gain for most sub-0.5 V designs presented in the literature. The DDA has 12.66 kHz gain bandwidth product, and consumes 313nW of power. The input thermal noise is 0.88 µV/Hz<sup>1/2</sup> and the average slew-rate is 14.7 V/ms at 20pF load capacitance. As an example of application, a band-pass filter (BPF) based on two DDAs with adjustable gain for electrocardiogram (ECG) signal processing is presented. The 0.18 µm CMOS technology from TSMC has been used and extensive simulation results in Cadence environment including process, voltage and temperature corners and Monte–Carlo analysis have been carried-out to demonstrate the robustness of the design. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Second-generation voltage conveyor-based first-order all-pass filters and application to quadrature sinusoidal oscillator(2025-02-01); ;Theppota, Burin ;Saksiri, Wiset ;Khateb, FabianSiripruchyanun, MontreeThis article describes 2 first-order voltage-mode all-pass filters (APFs) covering leading and lagging phases based on single capacitor and second-generation voltage conveyors (VCIIs). The proposed APFs comprise 2 VCIIs cooperating with 3 resistors and 1 capacitor. The phase angle of the output relative to input signals can be tuned by the single external resistor. Different from previously related works, they use only VCII+ which can be easily realized and less complicated for both integrated circuit architecture and off-the-shelf design. In addition, a 450 mV 1.98 µW VCII based on bulk-driven quasi-floating-gate MOS transistor was developed to be used in this work to achieve ultra low-voltage and low-power consumption. The proposed APFs offer a phase shifting function over a wide range of operating frequency. Its output also provides an accurate sinusoidal signal. The testing results obtained from Cadence Virtuoso System Design Platform simulation are disclosed to investigate different behaviors of the proposed APFs. In addition, the experimental setup using commercially available integrated circuits is shown. From the both results, it is found that they are agreed well with the mentioned anticipations. An application of the proposed APFs in quadrature sinusoidal oscillator is also depicted, it enjoys independent controllability of oscillation condition and oscillation frequency for a wide range of operating frequency with a precise quadrature output signal. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Shadow filters based on DDCC(2017-11-01) ;Khateb, Fabian; ;Kulej, Tomasz; Kubánek, DavidThis study presents a new realisation of voltage-mode shadow filters based on low-voltage low-power differential difference current conveyor (DDCC). Thanks to the attractive features of the DDCC, including its capability of performing arithmetic operations, the proposed filters offer the advantage of circuit simplicity, minimum number of active and passive elements, and no need for additional summing circuit, compared to the previous available shadow filter designs. The DDCC was designed and fabricated in Cadence platform using 0.35 μm CMOS AMIS process with supply voltage and power consumption of 1 V and 37 μW, respectively. The presented simulation and experimental results using a real chip validate the functionality of the proposed filters. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Comparative study of sub-volt differential difference current conveyors(2013-12-01) ;Khateb, Fabian; ; Enhancing the performances of analog circuits with sub-volt supplies becomes a great challenge for circuit designers. Techniques such as bulk-driven (BD) and quasi-floating gate (QFG) count among the suitable ones for ultra-low voltage (ULV) operation capability with extended input voltage range and simple CMOS circuitry. However, in comparison to the conventional gate-driven (GD) MOS transistor (MOST), these techniques suffer from several disadvantages such as low transconductance value and bandwidth that limit their applicability for some applications. Therefore, the idea of merging the BD and QFG techniques to eliminate their drawbacks appears as efficacious solution. This new merging is named bulk-driven quasi-floating gate (BD-QFG)<sup>*</sup> technique and in order to demonstrate its advantages in compassion to BD and QFG ones, this paper presents a comparison study of three ULV differential difference current conveyor (DDCC) blocks based on BD, QFG and BD-QFG techniques. The significant increment of the transconductance and the bandwidth values of the BD-QFG are clearly observed. The proposed CMOS structures of the DDCCs work at ±300 mV supply voltage and 18.5 μW power consumption. The simulation results using 0.18 μm CMOS n-Well process from TSMC show the features of the proposed circuits. © 2013 Elsevier Ltd. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Ultra-low voltage tunable transconductor based on bulk-driven quasi-floating-gate technique(2013-09-01) ;Khateb, Fabian ;Khatib, Nabhan; ; Fujcik, LukasThis paper presents ultra-low voltage transconductor using a new bulk-driven quasi-floating-gate technique (BD-QFG). This technique leads to significant increase in the transconductance and the bandwidth values of the MOS transistor (MOST) under ultra-low voltage condition. The proposed CMOS structure of the transconductor is capable to work with ultra-low supply voltage of ±300 mV and low power consumption of 18 μW. The transconductance value of the transconductor is tunable by external resistor with wide linear range. To prove the validation of the new described technique a second-order G<inf>m</inf>-C multifunction filter is presented as one of the possible applications. The simulation results using 0.18 μm CMOS N-Well process from TSMC show the attractive features of the proposed circuit. © 2013 World Scientific Publishing Company. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Gain-Controllable Transadmittance-Mode First-Order Allpass Filters with Electronic Tune Using Single Active Element(2024-02-01) ;Tanaphatsiri, Chaiya ;Khateb, Fabian ;Sotner, RomanFirst-order allpass filters are analog filters with a unit magnitude response, but they change the phase shift between input and output signals at various frequencies. This paper presents the transadmittance-mode first-order allpass filters based on the modified current-controlled current differencing transconductance amplifier (M-CCCDTA). The proposed filters utilize a single M-CCCDTA and a grounded capacitor with no external resistors, making them well suited for implementation in an integrated circuit. The gain and phase response of the proposed filters can be adjusted electronically and separately. Also, the high output impedance of the proposed filters at both the input voltage node and the output current node makes cascading easy without the need for buffer devices. A quadrature sinusoidal oscillator based on the proposed first-order allpass filter has been designed as an example of an application. The PSpice simulation and actual experiments are utilized to validate the functionality of the proposed filters. The simulation and experimental results are consistent with the idea of anticipation.
