Sirimasakul, Silar
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Preferred name
Sirimasakul, Silar
Alternative Name
Sirimasakul, S.
Main Affiliation
Email
silar.si@kmitl.ac.th
2 results
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Item type:Publication, A Logarithmic Level-Crossing ADC with Fixed Comparison Window(2022-01-01); Thanachayanont, ApinuntThis paper describes the design and realization of a logarithmic level-crossing analog-to-digital converter with fixed comparison window. The proposed circuit comprises two comparators, a logarithmic charge-sharing digital-to-analog converter, a control logic circuit, and an up/down counter. The circuit is designed and simulated with process parameters from a 0.18 μm CMOS technology and a 1.8 V power supply voltage. Simulation results showed that the overall circuit exhibited the minimum resolution of 3.9mV and the maximum INL and DNL errors of -0.17LSB and -0.09LSB, respectively. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A logarithmic level-crossing ADC(2017-11-03); Thanachayanont, ApinuntA 3-bit logarithmic level-crossing analog-to-digital converter (LC-ADC) for biomedical applications is presented. Based on the feedback LC-ADC structure, the proposed circuit is realized by using logarithmic charge-scaling digital-to-analog converters. The circuit is designed and simulated with process parameters from a 0.35-μm CMOS technology and a 1.5-V power supply voltage. Process corner simulation results showed that the INL and DNL errors are within the range of +0.14/-0.09LSB and +0.14/-0.21LSB, respectively.