Sooksood, Kriangkrai
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Sooksood, Kriangkrai
Alternative Name
Sooksood, K.
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kriangkrai.so@kmitl.ac.th
16 results
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Item type:Publication, Distributed clock gating for power reduction of a programmable waveform generator for neural stimulation(2012-12-14) ;Noorsal, Emilia; ;Bihr, Ulrich ;Becker, JoachimOrtmanns, MauritsThis paper describes how to employ distributed clock gating to achieve an overall low power design of a programmable waveform generator intended for a neural stimulator. The power efficiency is enabled using global timing control combined with local amplitude distribution over a bus to the local stimulator frontends. This allows the combination of local and global clock gating for complete sub-blocks of the design. A counter and a shifter employed at the local digital stimulator reduce the design complexity for the waveform generation and thus the overall power consumptions. The average power results indicate that 63% power can be saved for the global stimulator control unit and 89-96% power can be saved for the local digital stimulator by using the proposed approach. The circuit has been implemented and successfully tested in a 0.35 μm AMS HVCMOS technology. © 2012 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A High-Q Floating Active Inductor Based VCO for L-Band and Lower C-Band Applications in 180 nm CMOS Technology(2023-10-01) ;Hota, Aditya Kumar ;Sethi, Kabiraj; Mohapatra, Sushanta KumarThis paper presents a low power, wide-tuned Inductor-capacitor (LC) voltage-controlled oscillator (VCO). A floating active inductor (FAI) with a high-quality factor (Q) is used in the VCO design. The FAI is designed with a cascode transistor pair and a cross-coupled transistor pair to achieve a high Q value of up to 3290. The inductance value of the FAI ranges from 12.5 nH to 256.2 nH. The VCO has 164.8% of oscillation frequency tuning, from 235 MHz to 2.83 GHz with a phase noise of −85.3 dBc/Hz to −102.4 dBc/Hz at 1 MHz offset frequency. The FAI and VCO have 17.1 × 18 µm<sup>2</sup> and 58.6 × 64.6 µm<sup>2</sup> silicon area respectively. The power consumption ranges from 6.8 mW to 8.62 mW within the frequency tuning range. The FAI and VCO are designed in UMC 0.18 µm mixed-mode CMOS technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A multichannel neurostimulator with transcutaneous closed-loop power control and self-adaptive supply(2012-12-14) ;Xu, Hongcheng ;Noorsal, Emilia; ;Becker, JoachimOrtmanns, MauritsThis paper presents an integrated multichannel neurostimulator ASIC with improved power management efficiency. The stimulator features transcutaneous closed-loop power control that enables optimum power transfer in spite of the coupling variation as well as the variation in the stimulation threshold/current. A programmable adaptive supply in the high voltage (HV) domain is further proposed to minimize the power dissipation during the active stimulation mode in terms of stimulus current/electrode impedance inconsistencies. The stimulator prototype, including the power management, the digital control as well as a 16 channel stimulation frontend, is fabricated in AMS 0.35μm HV CMOS technology. In measurements, automatic supply voltage adaptation from 13.1V to 8V with running stimulations has been achieved, resulting in maximum power saving of 40% for the implantable circuit. © 2012 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Flexible Biphasic Functional Electrical Stimulator for Children with Cerebral Palsy(2021-08-27) ;Hussain, Zakaria ;Mustapha, Harith Firdaus ;Noorsal, Emilia ;Ahmad, Khairul AzmanThe functional electrical stimulator, FES has been extensively used for rehabilitation, however, in children with cerebral palsy, the need for a suitable FES device is vital. The current available FES device on the market is mostly not a robust and multifunction device. The need of flexible FES where the parameter that can be adjusted is very important to develop In this paper, a biphasic functional electrical stimulator (FES) has been designed and implemented.. The parameter that need to be controlled in a rehabilitation activity for children with cerebral palsy such as voltage, current, frequency and pulse width. The main parts in the design of the simple biphasic functional electrical stimulator are controller, a digital-to-analog converter, and a constant current source. The constant current source consists of a biphasic amplifier, summing amplifier and Howland pump charge circuit. The result show that the Functional Electrical Stimulator developed capable to meet with the performance of the stimulated design in Proteus and capable to achieved the desired output needed for rehabilitation for children with cerebral palsy. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A thz metamaterial absorber with multiple polarization: Insensitive, sensitive, and tunable(2021-01-01) ;Mohanty, Ayesha ;Acharya, Om Prakash ;Appasani, Bhargav; Mohapatra, Sushanta KumarTerahertz (THz) absorbers are gaining interest in many applications. In this paper, we present the design and simulation of a multiband metama-terial absorber (MMA) with combined polarization properties and prominent absorption at 2.2 THz and 3.9 THz. The MMA comprises two square split-ring resonators and one square ring resonator placed on top of a polyimide dielectric spacer, offering multiband absorption characteristics with maximum absorptivity of 93.18% and 96.09%, respectively. The most protruding feature of this design is that it displays multiple polarization characteristics, including insensitivity, sensitivity, and tunability, even though the structure is similar to those of conventional absorbers. Firstly, the distinctly visible absorption spectra at 1.8 THz, gradually diminishes with an increase in polarization angle and then completely vanishes for TM polarization. Secondly, the prominent band at 2.2 THz is insensitive to changes in polarization of the incident wave, whereas, at 3.9 THz, the absorption band displays polarization tunability characteristics. Due to the multiple characteristics displayed by the structure, this MMA can be simultaneously used for several applications in the terahertz frequency regime such as imaging, terahertz spectroscopy, sensing, and stealth technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Multichannel Microstimulating SoC(2022-01-01) ;Noorsal, Emilia ;Xu, Hongcheng; Ortmanns, MauritsIn recent years, limited research was focused on designing a multichannel microstimulator that could demonstrate high flexibility in terms of pulse parameters, waveshapes, stimulation strategy, number of electrodes, high-voltage compliance, and variety of charge-balancing techniques to optimize the use of an implant chip for various implementations, changing operating conditions, or research on stimulation efficiency. The reason for this is that designing a highly flexible multichannel stimulator that could fulfill all the different neural applications while concurrently maintaining low power and area consumptions is not a trivial task. Normally, there is a trade-off between high flexibility and hardware complexity. For neural applications, including neuromuscular, cochlear implant, and deep brain stimulators, which require a small number of electrodes, high flexibility of waveform pattern at each stimulation site is not an issue. However, especially for a large number of electrodes, such as a retinal implant, having high flexibility in the waveform pattern is not easy to implement. Therefore, this chapter presents an overview of design and implementation of flexible multichannel microstimulator in system on chip (SoC). Firstly, the importance of having high flexibility in neural stimulator application and the trade-off between high flexibility and hardware complexity are discussed. Secondly, the state of the art of flexible waveform generation, charge-balancing techniques for safe stimulation, and power management requirements in multichannel microstimulators are reviewed. Thereafter, the examples of overall design architecture, stimulation protocols, flexible stimulation, and functionality for a multichannel epiretinal stimulator ASIC with 1024 electrodes are provided. In addition, an area- and power-efficient stimulator front-end circuit which covers the HV current driver, compliance monitor, and several types of charge-balancing techniques are further elucidated. Finally, a power management circuit with closed-loop power control and dynamic supply adaptation for multichannel epiretinal stimulator is explained in detail. A 16-channel epiretinal microstimulator has been developed and successfully tested in a 0.35 µm AMS HVCMOS technology. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Multistimulator backchannel communication link implemented for safety information and closed-loop power management(2014-03-30) ;Noorsal, Emilia; ;Xu, Hongcheng ;Sukumaran, DeeptiOrtmanns, MauritsThis paper describes the importance of having a backchannel communication link between a microstimulator ASIC and an external control unit for complete safety closure and closed-loop power management. An example of the overall microstimulation system with backchannel communication link for an epiretinal implant is provided. Additionally, the backchannel operation and protocol between the implant chip and the external control unit are given. The flexible multichannel stimulator was implemented and successfully tested in a 0.35 μm AMS HVCMOS technology. A test measurement setup is developed to test the functionality of bidirectional communication between the fabricated stimulator ASIC and the external control unit. Conducted measurement results on erroneous data packet, non-accomplished charge balancing and supply voltage adaptation validate the functionality of the bidirectional communication system. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Wide current range and high compliance-voltage bulk-driven current mirrors: Simple and cascode(2017-01-03)This paper presents novel bulk-driven current mirror and bulk-driven cascode current mirror. Bulk-driven technique is employed to overcome a threshold voltage limitation. High accuracy transfer characteristic over wide current range is achieved through a negative feedback. The proposed circuits are designed and simulated with a 0.18 μm CMOS technology. They operate at 1 V power supply. The simulation results show the headroom voltage of 0.11 V and 0.16 V for the proposed bulk driven current mirror and bulk driven cascode current mirror, respectively. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A Highly Compliant Current Driver for Electrical Stimulator with Compliance Monitor and Digital Controlled Offset Regulation Charge Balancing(2020-03-01); Noorsal, EmiliaA CMOS current driver for electrical stimulator in 0.35μm HVCMOS is presented in this paper. It is based on the regulated cascode current mirror in deep triode region. This driver requires approximately 500mV overdrive voltage over the current of 4μA to 1mA whereas maintaining output impedance higher than 10MΩ. The proposed topology also comes with the possibility to monitor the compliance voltage which is useful for the power-efficient adaptive supply voltage stimulation. Besides, the offset regulation active charge balancing is implemented using digitally controlled additional current sources. It is verified in vitro using a platinum black electrode in saline solution. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, A Low Dropout Voltage Regulated Bulk-driven CMOS Current Mirror(2016-01-01) ;Minwong, Nutthawut; Thanachayanont, ApinuntNovel bulk-driven current mirror (CM) and bulk-driven cascode CM are presented in this paper. Bulk-driven technique is employed to overcome a threshold voltage limitation. Proposed circuits operate at 1 V power supply. By using a negative feedback, high accuracy input and output transfer characteristic over wide current range is achieved. The proposed circuits are simulated using a 0.18 μm CMOS technology. The headroom voltage is 0.11 V for the proposed bulk driven CM and 0.16 V for the proposed bulk driven cascode CM.
