Sooksood, Kriangkrai

Preferred name

Alternative Name

Sooksood, K.

Main Affiliation

School of Engineering

kriangkrai.so@kmitl.ac.th

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Distributed clock gating for power reduction of a programmable waveform generator for neural stimulation
(2012-12-14)
Noorsal, Emilia
;
Sooksood, Kriangkrai
;
Bihr, Ulrich
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Becker, Joachim
;
Ortmanns, Maurits
This paper describes how to employ distributed clock gating to achieve an overall low power design of a programmable waveform generator intended for a neural stimulator. The power efficiency is enabled using global timing control combined with local amplitude distribution over a bus to the local stimulator frontends. This allows the combination of local and global clock gating for complete sub-blocks of the design. A counter and a shifter employed at the local digital stimulator reduce the design complexity for the waveform generation and thus the overall power consumptions. The average power results indicate that 63% power can be saved for the global stimulator control unit and 89-96% power can be saved for the local digital stimulator by using the proposed approach. The circuit has been implemented and successfully tested in a 0.35 μm AMS HVCMOS technology. © 2012 IEEE.
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A multichannel neurostimulator with transcutaneous closed-loop power control and self-adaptive supply
(2012-12-14)
Xu, Hongcheng
;
Noorsal, Emilia
;
Sooksood, Kriangkrai
;
Becker, Joachim
;
Ortmanns, Maurits
This paper presents an integrated multichannel neurostimulator ASIC with improved power management efficiency. The stimulator features transcutaneous closed-loop power control that enables optimum power transfer in spite of the coupling variation as well as the variation in the stimulation threshold/current. A programmable adaptive supply in the high voltage (HV) domain is further proposed to minimize the power dissipation during the active stimulation mode in terms of stimulus current/electrode impedance inconsistencies. The stimulator prototype, including the power management, the digital control as well as a 16 channel stimulation frontend, is fabricated in AMS 0.35μm HV CMOS technology. In measurements, automatic supply voltage adaptation from 13.1V to 8V with running stimulations has been achieved, resulting in maximum power saving of 40% for the implantable circuit. © 2012 IEEE.
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Flexible Biphasic Functional Electrical Stimulator for Children with Cerebral Palsy
(2021-08-27)
Hussain, Zakaria
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Mustapha, Harith Firdaus
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Noorsal, Emilia
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Ahmad, Khairul Azman
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Sooksood, Kriangkrai
The functional electrical stimulator, FES has been extensively used for rehabilitation, however, in children with cerebral palsy, the need for a suitable FES device is vital. The current available FES device on the market is mostly not a robust and multifunction device. The need of flexible FES where the parameter that can be adjusted is very important to develop In this paper, a biphasic functional electrical stimulator (FES) has been designed and implemented.. The parameter that need to be controlled in a rehabilitation activity for children with cerebral palsy such as voltage, current, frequency and pulse width. The main parts in the design of the simple biphasic functional electrical stimulator are controller, a digital-to-analog converter, and a constant current source. The constant current source consists of a biphasic amplifier, summing amplifier and Howland pump charge circuit. The result show that the Functional Electrical Stimulator developed capable to meet with the performance of the stimulated design in Proteus and capable to achieved the desired output needed for rehabilitation for children with cerebral palsy.
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Multichannel Microstimulating SoC
(2022-01-01)
Noorsal, Emilia
;
Xu, Hongcheng
;
Sooksood, Kriangkrai
;
Ortmanns, Maurits
In recent years, limited research was focused on designing a multichannel microstimulator that could demonstrate high flexibility in terms of pulse parameters, waveshapes, stimulation strategy, number of electrodes, high-voltage compliance, and variety of charge-balancing techniques to optimize the use of an implant chip for various implementations, changing operating conditions, or research on stimulation efficiency. The reason for this is that designing a highly flexible multichannel stimulator that could fulfill all the different neural applications while concurrently maintaining low power and area consumptions is not a trivial task. Normally, there is a trade-off between high flexibility and hardware complexity. For neural applications, including neuromuscular, cochlear implant, and deep brain stimulators, which require a small number of electrodes, high flexibility of waveform pattern at each stimulation site is not an issue. However, especially for a large number of electrodes, such as a retinal implant, having high flexibility in the waveform pattern is not easy to implement. Therefore, this chapter presents an overview of design and implementation of flexible multichannel microstimulator in system on chip (SoC). Firstly, the importance of having high flexibility in neural stimulator application and the trade-off between high flexibility and hardware complexity are discussed. Secondly, the state of the art of flexible waveform generation, charge-balancing techniques for safe stimulation, and power management requirements in multichannel microstimulators are reviewed. Thereafter, the examples of overall design architecture, stimulation protocols, flexible stimulation, and functionality for a multichannel epiretinal stimulator ASIC with 1024 electrodes are provided. In addition, an area- and power-efficient stimulator front-end circuit which covers the HV current driver, compliance monitor, and several types of charge-balancing techniques are further elucidated. Finally, a power management circuit with closed-loop power control and dynamic supply adaptation for multichannel epiretinal stimulator is explained in detail. A 16-channel epiretinal microstimulator has been developed and successfully tested in a 0.35 µm AMS HVCMOS technology.
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Multistimulator backchannel communication link implemented for safety information and closed-loop power management
(2014-03-30)
Noorsal, Emilia
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Sooksood, Kriangkrai
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Xu, Hongcheng
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Sukumaran, Deepti
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Ortmanns, Maurits
This paper describes the importance of having a backchannel communication link between a microstimulator ASIC and an external control unit for complete safety closure and closed-loop power management. An example of the overall microstimulation system with backchannel communication link for an epiretinal implant is provided. Additionally, the backchannel operation and protocol between the implant chip and the external control unit are given. The flexible multichannel stimulator was implemented and successfully tested in a 0.35 μm AMS HVCMOS technology. A test measurement setup is developed to test the functionality of bidirectional communication between the fabricated stimulator ASIC and the external control unit. Conducted measurement results on erroneous data packet, non-accomplished charge balancing and supply voltage adaptation validate the functionality of the bidirectional communication system.
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A Highly Compliant Current Driver for Electrical Stimulator with Compliance Monitor and Digital Controlled Offset Regulation Charge Balancing
(2020-03-01)
Sooksood, Kriangkrai
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Noorsal, Emilia
A CMOS current driver for electrical stimulator in 0.35μm HVCMOS is presented in this paper. It is based on the regulated cascode current mirror in deep triode region. This driver requires approximately 500mV overdrive voltage over the current of 4μA to 1mA whereas maintaining output impedance higher than 10MΩ. The proposed topology also comes with the possibility to monitor the compliance voltage which is useful for the power-efficient adaptive supply voltage stimulation. Besides, the offset regulation active charge balancing is implemented using digitally controlled additional current sources. It is verified in vitro using a platinum black electrode in saline solution.
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Recent advances in power efficient output stage for high density implantable stimulators
(2012-12-14)
Sooksood, Kriangkrai
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Noorsal, Emilia
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Bihr, Ulrich
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Ortmanns, Maurits
A major drawback of a current-controlled stimulation is its power efficiency. However, it is commonly used in implantable stimulators due to its safety. The power efficiency of a current-controlled stimulation can be improved by reducing the headroom voltage needed in the current driver. A promising technique is to bias the transistor in triode region whereas improving output impedance through the regulated cascode structure. This comes with a feature of implicit compliance monitor which is used for the supply voltage adaptation. This paper presents an overview on recent power efficient high voltage-compliance output drivers. © 2012 IEEE.

Sooksood, Kriangkrai

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