Chivapreecha, Sorawat

Preferred name

Alternative Name

Chivapreecha, S.

Chivapreecha, Sorwat

Main Affiliation

School of Engineering

sorawat.ch@kmitl.ac.th

Now showing 1 - 10 of 75

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CubeSat image transmission in JPEG compression: An experiment on high altitude platform
(2016-03-23)
Techavijit, Pirada
;
Chivapreecha, Sorawat
;
Sukchalerm, Polkit
;
Plodpai, Aniwat
CubeSat is a type of picosatellite which is developed with the purposes of promoting and development the skills necessary for the design, manufacturing, and testing of small satellites in the future. This paper presents our work on CubeSat design and development which focuses on JPEG compression and transmission to ground station. And this paper also uses the high altitude balloon to verify CubeSat functions as it is low cost experiments but can provide conditions similar to spacelike: pressure, temperature, air density as well as distance for communication. This paper will discuss the testing result of CubeSat on high altitude balloon to examine functions, verify link budget and signal strength in stratosphere at maximum altitude of 24 kilometers.
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Morphology-based algorithm and application for mammographic masses segmentation
(2013-01-01)
Suapang, Piyamas
;
Naruephai, Chadaporn
;
Chivapreecha, Sorawat
Medical images segmentation is an important work for object recognition of the human organs and it is an important pre-processing step in medical image segmentation and 3D reconstruction. Conventionally, segmentation is detected according to some early brought forward algorithms such as gradient-based algorithm and template-based algorithm, but they are not so good for noise medical image segmentation. In this paper, basic morphological theory and operations are introduced at first, and then a novel morphological segmentation algorithm is proposed to detect the segment of mammographic masses with salt-And-pepper noise. The experimental results show that the proposed algorithm is more efficient for medical image denoising and segmentation than the usually used template-based segmentation algorithms and general morphological segmentation algorithms. Furthermore, the application is helpful for physician and doctors in diagnosis of the breast cancer in further steps.
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A Cubic Hermite variable fractional delay filter
(2011-12-01)
Soontornwong, Parinya
;
Chivapreecha, Sorawat
;
Pradabpet, Chusit
This paper presents a design and realization of cubic Hermite variable fractional delay (VFD) filter. Cubic Hermite interpolation will be formulated to cubic Hermite VFD filter which the amplitude response and delay response of proposed cubic Hermite VFD filter depend on the used approximation of first derivative. The structure realization of cubic Hermite VFD filter is shown based on Farrow structure as well. Finally, the amplitude response and delay response of the proposed cubic Hermite VFD filter will be compared with the cubic B-spline and Lagrange-type VFD filter. © 2011 IEEE.
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Deep Neural Networks for Sound Synthesis of Thai Duct F1ute, Khlui
(2021-04-01)
Sinjankhom, Tantep
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Chivapreecha, Sorawat
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Chitanont, Nachanant
;
Kato, Tomonori
This paper introduces Thai musical instrument sound synthesis with an intelligent technique which is a combination of deep neural networks and conventional signal processing techniques. The instrument focused on in this paper is the Khlui, which is a unique Thai reedless wind instrument. Khlui sound can be synthesized by performing a combination of additive and subtractive syntheses. The synthesis system takes the pitch and loudness of any monophonic input signal. Then, multilayer perceptron and recurrent neural networks are used together in order to generate 3 parameters which are harmonic distribution, filter magnitude response, and the signal envelope. Finally, the harmonic characteristic of the Khlui along with the blowing noises are highly synthesized. The results are natural-sounding and realistic when compared with the recorded Khlui audio. This research will contribute to the more convenient natural synthesis of the Khlui sounds.
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An FPGA-based implementation of variable fractional delay filter
(2009-10-19)
Nithirochananont, Ussanai
;
Chivapreecha, Sorawat
;
Dejhan, Kobchai
A variable fractional delay (VFD) filter is widely used in applications such as symbol timing recovery, arbitrary sampling rate conversion and echo cancellation. This paper presents an implementation of variable fractional delay filter on FPGA. The implementation utilizes an efficient structure so called Taylor structure. The main advantage of this structure is to reduce number of multiplier and adder when compared with Farrow structure or modified Farrow structure. The result of implementation will be reported as throughput and area utilization. ©2009 IEEE.
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Design and Implementation of Multiphase Digital Oscillator
(2024-01-01)
Jongsataporn, Thitaphan
;
Yospanya, Poonna
;
Chivapreecha, Sorawat
This paper presents a design and implementation of the multiphase digital oscillator, which can determine the initial phase of multi-output signals to desired initial phases. The proposed system consists of biquad digital oscillator to oscillate the reference signal, and the new phase shifters which are first order IIR filters that can shift the phase of signals at a specified frequency to give them the desired phases. Design example and simulation results will be shown. Moreover, real-time hardware implementation on STM32 digital signal processor can be demonstrated to confirm the proposed design can work with hardware experimental results.
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Variable to variable crossover in GA to solve PAPR reduction in OFDM systems
(2014-02-12)
U-Thong, Sutud
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Pradabpet, Chusit
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La-Inchua, Jaraspat
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Chivapreecha, Sorawat
;
Soontornwong, Parinya
The hybrid of partial transmit sequences (PTS) and cascade adaptive peak power reduction (CAPPR) methods have been used to reduce peak to average power ratio (PAPR) of orthogonal frequency division multiplexing (OFDM) system. When number of sub-block increases, PAPR is getting small. However, the calculation cost of its selection must be considerably large. We introduce variable to variable crossover in GA, the total calculation cost becomes drastically reduced. The parameter for simulation used standard WLAN in IEEE 802.11a system. In simulation results, the proposed method shows the improvement performance PAPR and bit error rate (BER) of an OFDM system.
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Selecting an access point for indoor localization system using frequency analysis
(2019-07-01)
Suwannawach, Piyapan
;
Chivapreecha, Sorawat
Even though Indoor localization system has been continuously developed, there have also been some amounts of errors in the positioning due to the variance of the signal. This paper proposes a method to help selecting an access point to reduce the variance of received signal strength indicator (RSSI) using frequency analysis and applied genetic algorithm to search the optimal weights for weighted distant fingerprint algorithm (WDF). Experiments were conducted in the indoor environment using android mobile received signal strength from the access point and the proposed algorithm compared with K-Nearest Neighbor (KNN) algorithm and conventional weighted distant fingerprint (WDF) algorithm. Results have demonstrated the proposed algorithm that can improve an increased accuracy up to 89.75% for more accurate identification.
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Universal biquadratic digital filter with tunable capability
(2011-12-01)
Chivapreecha, Sorawat
This paper presents a tunable universal biquadratic digital filter. The transfer functions in z-domain of universal biquadratic digital filter that can give five outputs simultaneously are obtained by bilinear s-z transformation using modified bilinear Pascal matrix. The universal biquadratic digital filter structure has shown before the tunable approach of universal biquadratic digital filter will be derived later. The center frequency and bandwidth of the proposed tunable universal biquadratic digital filter can be tuned by tuning parameters. © 2011 IEEE.
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Embedded Hardware Implementation of Noise Gate on STM32 Processor Using MATLAB/Simulink
(2025-01-01)
Jongsataporn, Thitaphan
;
Chivapreecha, Sorawat
This paper presents a model-based approach for developing a digital signal processing (DSP) system, specifically focusing on a Noise Gate application, using MATLAB/Simulink, and deploying it on the STM32F769I-Discovery board. The study thoroughly examines the advantages of model-based hardware implementation, particularly in facilitating rapid prototyping for real-time applications in educational contexts. The STM32F769I is powered by a high-performance Arm® Cortex®-M7 core, which can execute DSP instructions efficiently. Its ample memory and built-in debugging tools enhance its suitability for complex signal processing tasks. The implementation leverages MATLAB/Simulink and its robust compatibility with the STM32 hardware, allowing for seamless software and hardware component integration. The powerful model-based development features streamline the transition from simulation to physical hardware, reducing development time and enhancing reliability. The Noise Gate application is designed to control audio signals effectively, eliminating unwanted background noise through user-defined parameters such as threshold, attack time, and release time, which optimize performance based on specific audio environments. Additionally, the design applies a first-order IIR low-pass as a smoothing filter, which dynamically adjusts the gain according to the characteristics of the incoming audio signal. This ensures gradual opening and closing of the gate, resulting in smoother audio transitions. The results demonstrate significant noise suppression and overall audio quality enhancement, highlighting the practicality of employing model-based design methodologies for DSP applications. Furthermore, the insights gained from this study contribute to efficient hardware prototype development and offer implications for future projects in the field of digital signal processing.

Chivapreecha, Sorawat

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