Kumngern, Montree

Preferred name

Kumngern, Montree

Alternative Name

KUMNGERN, Montree

Kumngern, M.

Main Affiliation

School of Engineering

montree.ku@kmitl.ac.th

Now showing 1 - 10 of 15

Some of the metrics are blocked by your
consent settings
16-nW 0.5-V low-pass filter for bio-signal applications
(2025-01-01)
Phatsornsiri, Punnavich
;
Kumngern, Montree
;
Khateb, Fabian
;
Torteanchai, Usa
;
Wongprommoon, Natapong
A low-voltage, ultra-low power fully differential low-pass filter for bio-signal applications using multiple-input fully differential operational transconductance amplifiers (OTA) is presented in this article. The multiple inputs of OTA can be achieved using multiple-input dynamic threshold MOS transistor (MIDT-MOST) technique. The novelty of this work is to exhibit the proposed filter using multiple-input OTAs, which leads to a reduction in the number of active OTAs and power consumption. The fourth-order low-pass filter that is cascaded by two second-order filters has been presented. The fourth-order low-pass filter is designed and simulated in the Cadence environment using the 0.18 μm CMOS technology from TSMC at a supply voltage of 0.5 V. The simulation results show that the filter consumes 16 nW of power at a bandwidth of 110 Hz, has a total harmonic distortion (THD) of 1 % at 204.96 mV input amplitude, and provides dynamic range of 69.24 dB. These results indicate that the proposed low-pass filter can be applied to bio-signal processing applications.
Some of the metrics are blocked by your
consent settings
1.2 v Differential Difference Current Conveyor Using MIGD MOST Technique
(2022-01-01)
Phatsornsiri, Punnavich
;
Torteanchai, Usa
;
Rattanasuttikan, Manurak
;
Jongchanachavawat, Wirote
;
Kumngern, Montree
This paper presents a new differential difference current conveyor (DDCC) using multiple-input gate-driven MOS transistor (MIGD MOST) technique. The MIGD MOST technique can be reduced the number of transistor differential pair. The differential input stage is implemented by flipped voltage follower to obtain low power supply requirements. Thus, the proposed DDCC is capable to working with a supply voltage of 1.2 V and it consumes a 44.2 μW of power dissipation. The simulations were performed with PSPICE using the 0.18 μm CMOS technology to prove the workability of the new circuit.
Some of the metrics are blocked by your
consent settings
Mixed-mode quadrature oscillator using a single DDCCTA and grounded passive components
(2015-01-01)
Phatsornsiri, Punnavich
;
Lamun, Panit
;
Kumngern, Montree
A new mixed-mode quadrature oscillator using a single differential difference current conveyor transconductance amplifier (DDCCTA), two grounded resistors, and two grounded capacitors is presented. The proposed circuit provides both quadrature voltage and quadrature current outputs simultaneously. The condition of oscillation (CO) and frequency of oscillation (FO) of the circuit are orthogonally controllable. The circuit is beneficial to monolithic integrated circuit implementation by using all grounded passive components. Moreover, the active and passive sensitivities of the proposed configuration are low. The validity of the proposed oscillator has been established by PSPICE simulations using MIETEC 0.5 μm CMOS technology.
Some of the metrics are blocked by your
consent settings
Voltage-mode universal biquadratic filter using a single DDCCTA
(2013-12-01)
Lamun, Panit
;
Phatsornsiri, Punnavich
;
Kumngern, Montree
;
Torteanchai, Usa
In this paper, a novel two-input four-output voltage-mode universal biquadratic filter is presented. The filter circuit uses only one differential difference current conveyor trans-conductance amplifier (DDCCTA) and four passive components. The circuit can provide low-pass (LP), band-pass (BP), band-stop (BS), high-pass (HP), and all-pass (AP) biquadratic functions. The natural angular frequency (ω<inf>o</inf>) and the quality factor (Q) can be orthogonally tuned by adjusting the circuit components. The proposed configuration has a low component count and low active and passive sensitivities. PSPICE simulations with 0.5 μm MIETEC CMOS process parameters are given to confirm the theoretical predictions. © 2013 IEEE.
Some of the metrics are blocked by your
consent settings
Current-Mode First-Order Versatile Filter Using Translinear Current Conveyors with Controlled Current Gain
(2023-07-01)
Kumngern, Montree
;
Jongchanachavawat, Wirote
;
Phatsornsiri, Punnavich
;
Wongprommoon, Natapong
;
Khateb, Fabian
This paper offers a new current-mode first-order versatile filter employing two translinear current conveyors with controlled current gain and one grounded capacitor. The proposed filter offers the following features: realization of first-order transfer functions of low-pass, high-pass, and all-pass current responses from single topology, availability of non-inverting and inverting transfer functions for all current responses, electronic control of current gain for all current responses, no requirement of component-matching conditions for realizing all current responses, low-input impedance and high-output impedance which are required for current-mode circuits, and electronic control of the pole frequency for all current responses. The proposed first-order versatile filter is used to realize a quadrature sinusoidal oscillator to confirm the advantage of the new topology. To confirm the functionality and workability of new circuits, the proposed circuit and its application are simulated by the SPICE program using transistor model process parameters NR100N (NPN) and PR100N (PNP) of bipolar arrays ALA400-CBIC-R from AT&T.
Some of the metrics are blocked by your
consent settings
1.2 V differential difference current conveyor using MIGD MOST technique and its applications
(2023-01-01)
Kumngern, Montree
;
Khateb, Fabian
;
Phatsornsiri, Punnavich
;
Jongchanachavawat, Wirote
;
Kulej, Tomasz
This paper presents a new differential difference current conveyor (DDCC), realized using multiple-input gate-driven MOS transistor (MIGD MOST) technique. The application of MIGD MOST can reduce the number of differential pairs in the input stage of the DDCC, thus simplifying its overall structure. Unlike previous DDCC, the output stage of the circuit operates in super class-AB, that offers low static power consumption, high load driving capability and improved gain-bandwidth product (GBW).The proposed DDCC can work with the supply voltage of 1.2 V and consumes 44.2 μW of power. The proposed DDCC has been used to realize a versatile circuit that can work as a universal filter or a quadrature oscillator into a single topology. When the circuit works as a universal filter, it can realize low-pass, band-pass, high-pass, band-stop and all-pass voltage responses. The natural frequency and the quality factor of these responses can be orthogonally controlled. When the circuit works as a quadrature oscillator, the condition and the frequency of oscillators can be orthogonally controlled. The proposed MIGD DDCC and the proposed universal filter and quadrature oscillator have been simulated with SPICE, using 0.18 μm CMOS process parameters to prove the functionality and workability of the new circuits.
Some of the metrics are blocked by your
consent settings
Tunable sinusoidal oscillator using CCII with variable current gain
(2013-01-01)
Kumngern, Montree
;
Phatsornsiri, Punnavich
;
Dejhan, Kobchai
This paper presents a new electronically tunable sinusoidal oscillator. The proposed oscillator is consisted of two second-generation current conveyors with variable current gain, two grounded capacitors, one grounded resistor and one floating resistor. Unlike previously oscillators, the condition and the frequency of oscillation of this oscillator can be controlled electronically and independently by adjusting the current gains of current conveyors. The proposed circuit is beneficial to monolithic integrated circuit implementation using only grounded capacitors. Simulation results that confirm the theoretical predictions are also given. © 2013 IEEE.
Some of the metrics are blocked by your
consent settings
Current-mode third-order quadrature oscillator using VDTAs and grounded capacitors
(2014-01-01)
Phatsornsiri, Punnavich
;
Lamun, Panit
;
Kumngern, Montree
;
Torteanchai, Usa
This paper presents a novel electronically tunable current-mode third-order quadrature oscillator based on voltage differencing transconductance amplifier (VDTA). The proposed oscillator is constructed using two VDTAs and three grounded capacitors, which is advantageous for integrated circuit implementation. The circuit provides two current outputs with 90° phase difference from high output impedance terminals. The condition of oscillation and the frequency of oscillation can be electronically tuned by adjusting the bias current of the VDTAs. The sensitivity studies of the circuit have been carried out. PSPICE simulations with 0.35 μm TSMC CMOS process parameters are given to confirm the theoretical analysis. © 2014 IEEE.
Some of the metrics are blocked by your
consent settings
Quadrature Oscillator Using Operational Transresistance Amplifiers
(2016-07-02)
Torteanchai, Usa
;
Phatsornsiri, Punnavich
;
Kumngern, Montree
This paper presents a new quadrature oscillator using operational transresistance amplifiers (OTRAs). The use of OTRA as active elements which offers low parasitic parameters, high slew rate and high bandwidth independent of the gain, precision of oscillating frequency can be achieved. The oscillating frequency and oscillating condition of proposed oscillator can be independently controlled. Also output terminals are possessed low impedance level which can be directly connected to the load without any buffer circuits. Simulation results verifying the theoretical analysis are included to confirm proposed structure. From simulation results, it can be expressed that the simulation result is very agree well with theory.
Some of the metrics are blocked by your
consent settings
0.5-V fully differential allpass section
(2017-01-18)
Phatsornsiri, Punnavich
;
Kumngern, Montree
;
Khateb, Fabian
This paper presents a new first-order allpass filter using bulk-driven transconductor which is suitable for biological signal processing applications. The proposed filter employs one transconductor, one resistor and two capacitors. The bulk-driven MOS transistor technique is used to provide 0.5 V supply voltage operation. The workability of the proposed topology is expressed through PSPICE simulators using TSMC 0.18 μm n-well CMOS process. Simulation results show that the circuit consumes the power of 11.7 μW and has total harmonic distortion (THD) of 1% for input signal of 30 mV<inf>P-P</inf>.

Kumngern, Montree

Filters

Settings

Sort By

Results per page