Kumngern, Montree

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Kumngern, Montree
Alternative Name
KUMNGERN, Montree
Kumngern, M.
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Email
montree.ku@kmitl.ac.th

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    Voltage-controlled floating resistor using DDCC
    (2011-04-01)
    Kumngern, Montree
    ;
    Torteanchai, Usa
    ;
    Dejhan, Kobchai
    This paper presents a new simple configuration to realize the voltage-controlled floating resistor, which is suitable for integrated circuit implementation. The proposed resistor is composed of three main components: MOS transistor operating in the non-saturation region, DDCC, and MOS voltage divider. The MOS transistor operating in the non-saturation region is used to configure a floating linear resistor. The DDCC and the MOS transistor voltage divider are used for canceling the nonlinear component term of MOS transistor in the non-saturation region to obtain a linear current/voltage relationship. The DDCC is employed to provide a simple summer of the circuit. This circuit offers an ease for realizing the voltage divider circuit and the temperature effect that includes in term of threshold voltage can be compensated. The proposed configuration employs only 16 MOS transistors. The performances of the proposed circuit are simulated with PSPICE to confirm the presented theory.
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    Electronically tunable multiple-input single-output voltage-mode multifunction filter employing simple CMOS OTAs
    (2010-12-01)
    Kumngern, Montree
    ;
    Torteanchai, Usa
    ;
    Dejhan, Kobchai
    This paper describes a new electronically tunable four inputs and single output voltage-mode universal biquadratic filter based on simple CMOS operational transconductance amplifiers (OTAs) and grounded capacitors. The proposed filter provides low-pass, high-pass, band-pass, band-stop and all-pass voltage responses at a high impedance input terminal, which enable easy cascadability. The circuit parameters ω<inf>o</inf> and Q can be orthogonally set the circuit component. The parameter ω<inf>o</inf> also offers an electronic control by adjusting the transconductance gain of the OTA. For realizing all the filter responses, no critical component matching condition is required and all the parameter sensitivities are low. PSPICE simulation results are performed to confirm the theoretical analysis. © 2010 IEEE.
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    A CMOS log-antilog current multiplier/divider circuit using DDCC
    (2011-12-01)
    Torteanchai, Usa
    ;
    Kumngern, Montree
    ;
    Dejhan, Kobchai
    This paper presents a new one-quadrant analog log-antilog multiplier/divider using only one differential different current conveyor and four diodes. The proposed circuit features low circuit complexity, very suitable for integrated circuit implementation and excellent temperature stability. Simulation results show performance of the circuit and confirm the validity of the proposed design technique. © 2011 IEEE.