Wiangtong, Theerayod

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Wiangtong, Theerayod
Alternative Name
Wiangtong, T.
Main Affiliation
Email
theerayod.wi@kmitl.ac.th

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    Item type:Publication,
    FPGA based-IC design for 3-phase PWM inverter with optimized space vector modulation schemes
    (2000-10-31)
    Sangchai, W.
    ;
    Wiangtong, T.
    ;
    Phungsangchotchung, T.
    ;
    Lumyong, P.
    This paper presents a novel idea to integrate three of the space vector modulation (SVM) schemes, including the alternating zero sequence, the symmetric sequence and the bus clamped scheme, in a single FPGA chip which provides many advantages. Flexibility, reliability and a very compact system are obviously obtained from this designed chip. Moreover, faster design and verification time, and design change without penalty are also benefits resulting from FPGA-based IC design. The optimized SVM schemes, frequencies and programmable deadtime that is used to adjust output signals are obtained through either 4x4 keypad or microprocessor port.
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    Item type:Publication,
    FPGA based-IC design for inverter with vector modulation technique
    (2000-01-01)
    Wiangtong, Theerayod
    ;
    Sangchai, Worranart
    ;
    Lumyong, Pichit
    This paper presents an application of an ALTERA FPGA Device, in the FLEX10K family, producing Pulse Width Modulation (PWM) signals with the vector modulation technique for an IGBT inverter. Using a single FPGA chip for the practical implementation of the modulator, rather than a system consisting of microprocessor and external memory, has many advantages including less use of power and space, short design time, greater speed and reliability. The designed circuit can generate PWM signals at many different frequencies, and also, the input values used to adjust output signal may be obtained through either a 4×4 keypad or microprocessor port.
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    Item type:Publication,
    FPGA-based IC design for 3-phase PWM inverter with optimized space vector modulation schemes
    (2000-01-01)
    Sangchai, Worranart
    ;
    Wiangtong, Theerayod
    ;
    Lumyong, Pichit
    This paper presents a novel idea to integrate three of the Space Vector Modulation (SVM) schemes, including the alternating zero sequence, the symmetric sequence and the bus clamped, in only a single FPGA chip which provides many advantages. Flexibility, reliability and very compact system are obviously obtained from this designed chip. Moreover, faster design and verification time, design change without penalty are also the benefits resulted in FPGA-Based IC design. The optimized SVM schemes, frequencies and programmable deadtime that used to adjust output signals are obtained through either 4×4 keypad or microprocessor port.
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    Item type:Publication,
    Design and implementation of FPGA-based control IC for 3-phase PWM inverter with optimized SVM schemes
    (2000-12-01)
    Sangchai, Worranart
    ;
    Wiangtong, Theerayod
    ;
    Hongyapanun, Apichai
    ;
    Wardkean, Pramote
    This paper presents a novel idea to integrate three PWM schemes based on the Space Vector Modulation (SVM) technique.This includes alternating zero sequence, symmetric sequence and bus clamped, strategies all of which are implemented using a single FPGA chip which provides several advantages. A flexible, reliable and very compact system is obviously obtained from this designd chip. Moreover, faster design and verification time, design change without penalty are additional benefits resulted from FPGA-Based IC design.The optimized SVM schemes, frequencies and programmable deadtime that are used to adjust output signals can be set through either 4×4 keypad or microprocessor port.