Kasemsuwan, Varakorn

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Kasemsuwan, Varakorn
Alternative Name
Kasemsuwan, V.
Kasemsuwan, Varakom
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Email
varakorn.ka@kmitl.ac.th

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    Low voltage adjustable CMOS Schmitt trigger
    (2011-07-01)
    Singhanath, Pratchayaporn
    ;
    Suadet, Apirak
    ;
    Kanjanop, Arnon
    ;
    Thongleam, Thawatchai
    ;
    Kuankid, Sanya
    This paper presents a low voltage adjustable CMOS Schmitt trigger using dynamic threshold MOS (DTMOS). Cross-coupled inverter with body control is employed to speed up the switching process, and control the intensity of the feedback. The proposed Schmitt trigger has been designed using 0.18 m 0.4 V CMOS technology and analyzed using PSPICE with BSIM3V3 device models. The simulation results show rail-to-rail operation and independently adjustable switching voltages for both low-to-high (V<inf>T(LH)</inf>) and high-to-low (V <inf>T(HL)</inf>) as high as 15 % of the supply voltage. The power dissipation is 0.13 W. © 2011 IEEE.
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    A 0.7 V DTMOS-based class AB current mirror
    (2011-12-05)
    Kanjanop, Arnon
    ;
    Kasemsuwan, Varakorn
    A 0.7 V DTMOS-Based class AB current mirror is presented. The circuit is developed based on a conventional class AB current mirror structure with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and operates under a 0.7 V supply. SPICE with BSIM3V3 model parameters is used to verify the circuit performance. The maximum current transfer is found to be 7 times larger than the input bias current, while the DC current gain is -0.03 dB. The bandwidth and power dissipation are 540 MHz and 96 μW, respectively. © 2011 IEEE.
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    A 0.8 v class-AB linear OTA using DTMOS for high-frequency applications
    (2011-07-01)
    Suadet, Apirak
    ;
    Thongleam, Thawatchai
    ;
    Kanjanop, Arnon
    ;
    Singhanath, Pratchayaporn
    ;
    Hirunsing, Buncha
    This paper presents a 0.8 V class-AB linear operational transconductance amplifier (OTA) using DTMOS for high-frequency applications. The circuit employs positive feedback to enhance the input impedance, and feed-forward technique to suppress the common-mode gain. The circuit is designed using 0.18 μm CMOS technology under 0.8 V supply. The simulation results show rail-to-rail input/output swing, suppressed common-mode response, and good linearity (less than -48 dB with input 0.6 V<inf>pp</inf>, 5 MHz). The power dissipation is 155 μW. © 2011 IEEE.
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    Low voltage class AB current differencing buffered amplifier (CDBA)
    (2011-12-01)
    Kanjanop, Arnon
    ;
    Kasemsuwan, Varakorn
    This paper presents a low voltage class AB current differencing buffered amplifier (CDBA). The circuit is developed based on two low voltage current mirrors and voltage follower. In the design, dynamic threshold voltage MOSFET (DTMOS) is employed as core devices. The proposed circuit is designed using a 0.13 m CMOS technology and can operate under the supply voltage of 0.7 V. The simulation results show the impedance at ports p, n, z and w of 16.89, 15.99, 102.4 k, and 15.56, respectively. The current transfer ratio i <inf>z</inf>/i <inf>p</inf>, i <inf>z</inf>/i <inf>n</inf> and voltage transfer ratio v <inf>w</inf>/v <inf>z</inf> are found to be close to one (i <inf>z</inf>/i <inf>p</inf>=0.998, i <inf>z</inf>/i <inf>n</inf>=0.996 and v <inf>w</inf>/v <inf>z</inf>=0.995) with the bandwidths of 460 MHz, 522 MHz and 172 MHz, respectively. © 2011 IEEE.
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    A 0.5 v class AB quasi FGMOS pseudo fully differential CMOS op-amp with rail-to-rail input/output swing
    (2011-07-01)
    Thongleam, Thawatchai
    ;
    Suadet, Apirak
    ;
    Kanjanop, Arnon
    ;
    Singhanath, Pratchayaporn
    ;
    Hirunsing, Buncha
    This paper presents a 0.5 V pseudo fully differential CMOS op-amp with rail-to-rail input/output swing. The circuit is designed based on class AB input and output stages. In the design, quasi FGMOS transistors are employed. The proposed amplifier is designed using 0.18 μm CMOS technology, and the simulation results show rail-to-rail input and output swings. The open-loop gain and gain-bandwidth product show 73.3 dB and 12.6 MHz. The CMRR is 73.2 dB (at 1 kHz) and the power consumption is 27.9 μW. © 2011 IEEE.
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    An ultra low voltage rail-to-rail DTMOS voltage follower
    (2011-07-01)
    Kanjanop, Arnon
    ;
    Suadet, Apirak
    ;
    Singhanath, Pratchayaporn
    ;
    Thongleam, Thawatchai
    ;
    Kuankid, Sanya
    An ultra low voltage rail-to-rail DTMOS voltage follower is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 m CMOS technology and SPICE is used to verify the circuit performance. The voltage follower can drive 0.25 V to the 500 with the total harmonic distortion (THD) of 0.4% at the operating frequency of 1 MHz. The bandwidth and power dissipation are 288 MHz and 103 W, respectively. © 2011 IEEE.