Kasemsuwan, Varakorn

Preferred name

Alternative Name

Kasemsuwan, V.

Kasemsuwan, Varakom

Main Affiliation

School of Engineering

varakorn.ka@kmitl.ac.th

Now showing 1 - 10 of 56

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A 3Volt high frequency and low input impedance CMOS current-mode precision full-wave rectifier
(2002-12-01)
Khucharoensin, Surachet
;
Kasemsuwan, Varakorn
This paper presents a 3Volt high frequency and low input impedance CMOS current mode precision full-wave rectifier. The circuit is designed based on an improved Wilson current miller. All MOS transistors are biased at low current resulting in small power dissipation. Negative feedback has been employed to reduce the input impedance of the circuit(236Ω). HSPICE is used to perform the simulation and the result shows the frequency of operation as high as 100 MHz with a standard 0.5μm CMOS technology. The mismatch obtained from the input and rectifier's output is 0.21% for an input current of ±150μA. The DC transfer characteristic shows good linearity, very sharp corner at zero crossing point and good symmetry during positive and negative input cycle while power dissipation is 5.8μW. © 2002 IEEE.
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Fringe Field Assisted Electrostatic Discharge in Polypropylene Manufacturing
(2020-03-01)
Charoensorn, Panudda
;
Srisonphan, Siwapon
;
Kanokbannakorn, Weerawoot
;
Kasemsuwan, Varakorn
Polypropylene (PP) is an electrical insulation material, and it can store electrostatic charge easily once they have friction with the metal or rubber rollers. Herein we present electrostatic issues in non-woven fabric manufacturing based on the roll to roll production processes. By using portable electrostatic-field meter measurements, we provide a low-cost and highly effective solution for discharging electrostatic charge before exposed or in contact with the operators, and we also identify where to install charge-dissipation technology to make it most useful. We employed the benefit of a highly and localized fringe field to discharge the electrostatic charge along the edge of the grounded metal rod placed at ~30 cm away. After placing the metal rod, the average of electrostatic potential of winding stock roll during spinning is decreased ~10 times, corresponding to ~0.2 μc/m<sup>3</sup> accumulated electrostatic charge on synthetic fabrics. The electric field distribution via the finite element method was illustrated corresponding to the reduction of electrostatic charge distribution in PP winding stock roll before and after inserting the grounded metal rod.
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A high performance class AB CMOS rail to rail voltage follower
(2002-01-01)
Boonyaporn, P.
;
Kasemsuwan, V.
A high performance class AB CMOS rail to rail voltage follower is presented. The circuit is based on the symmetrical class AB voltage follower and can operate under supply voltages of ±1.5 V. The proposed circuit has power dissipation of 2.5 mW under quiescent condition and can drive ±1.2 V to 250 Ω load with a total harmonic distortion of less than 0.6 percent and cut off frequency of 131 MHz. Although simple, the proposed circuit enables the output transistors to drive loads efficiently.
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Current voltage and capacitance voltage characteristics of dual channel high electron mobility transistor
(1999-12-01)
Kasemsuwan, Varakorn
In this paper, the current and the capacitance voltage characteristics of a dual channel high electron mobility transistor(DC-HEMT) are presented. The model uses a single analytical charge expression to describe four different charge components: two dimensional electron gas on the top and bottom channels, free electrons and neutralized donors in AlGaAs. The current voltage characteristics includes the effect of the parasitic source and drain resistances, the mobility degradation and channel length modulation through a quasi two dimensional Poisson equation. The capacitance-voltage expression is obtained through the summation of the variation of each charge component with respect to the variation of the gate voltage. Theoreticai predictions of the model are compared with the experimental data and found to be in good agreement.
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A high-gain fully-differential thermal noise-canceling CMOS front-end amplifier
(2011-12-05)
Chimpleekul, Puttachai
;
Kasemsuwan, Varakorn
This paper presents a fully-differential CMOS front-end amplifier using g<inf>m</inf>-boosting and noise-canceling techniques. The proposed front-end amplifier is designed based on a 0.18 μm standard CMOS process and 2 V supply. Simulation results show noise figure (NF) of 2.9 dB, while the voltage gain and bandwidth of the amplifier are 31.6 dB and 2 GHz, respectively. The power dissipation is 19 mW. © 2011 IEEE.
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A 3V robust high-speed low input impedance CMOS current comparator
(2004-12-01)
Khucharoensin, Surachet
;
Kasemsuwan, Varakorn
In this paper, a 3V robust high speed low input impedance CMOS current comparator is proposed. The circuit uses modified Wilson current-mirror to perform a current subtraction. Negative feedback is employed to reduce input impedances of the circuit. The diode connected transistors of the same type(NMOS) are used at the output making the circuit immune to the process variation. HSPICE is used to verify the circuit performance and the results show the propagation delay of 1.67 nsec with an average power dissipation of 0.63 mW using a standard 0.5μm CMOS technology for an input current of ±0.1μA at the supply voltage of 3V. The input impedances of the proposed current comparator are 123 Ω and 126 Ω while the maximum output voltage variation is only 1.9%. ©2004 IEEE.
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A 3 gb/s 80 db CMOS differential transimpedance amplifier for optical communication systems
(2005-12-01)
Pongpalit, Wacharapol
;
Kasemsuwan, Varakorn
;
Ahn, Hyungkeun
In this paper, a 3 Gb/s 80 dB differential CMOS transimpedance amplifier is proposed. The shunt-shunt feedback configuration is used to compromise between the wide bandwidth of the low impedance design and the low noise performance of the high impedance design. The basic amplifier employs fT doubler and compensation capacitor techniques to enhance the bandwidth. The phantom zero introduced by the feedback network is used to position the pole in any desired region of the close loop systems. HSPICE is used to verify the circuit performance with a standard 0.5 μm CMOS technology and supply voltage of 2.5 V. Simulation results demonstrate the gain and the speed of operation of 80 dB and 3 Gb/s respectively. The equivalent input noise current spectral density is found to be 7.8 pA√ Hz at 1 GHz and the total power dissipation is 58.4 mW. © 2005 IEEE.
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Simple ± 0.75 volt rail-to-rail current feedback operational amplifier and its application for oscillator
(2007-01-01)
Kasemsuwan, Varakorn
;
Nakhlo, Weerachai
A simple rail-to-rail CMOS current feedback operational amplifier (CFOA) is presented. The circuit is developed based on a simple complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and HSPICE is used to verify the circuit performance. The circuit operates under the supply of ± 0.75 Volt and can drive sinusoidal input of ± 0.5 Volt to a 300 Ω with the total harmonic distortion of less than 0.8% at 1 MHz. The amplifier, configured for non-inverting gain of two and a 300 Ω load provides 3-dB bandwidth of 40 MHz. The rising slew rate (SR+) and falling slew rate (SR-), for a 300 Ω // 5 pF load are 257 V/μS and 464 V/μS, respectively. The power dissipation is 2.6 mW.
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Robust high-speed low input impedance CMOS current comparator
(2004-12-01)
Khucharoensin, Surachet
;
Kasemsuwan, Varakorn
In this paper, a robust high speed low input impedance CMOS current comparator is proposed. The circuit uses modified Wilson current-mirror to perform a current subtraction. Negative feedback is employed to reduce input impedances of the circuit. The diode connected transistors of the same type(NMOS) are used at the output making the circuit immune to the process variation. HSPICE is used to verify the circuit performance and the results show the propagation delay of 1.67 nsec with an average power dissipation of 0.63 mW using a standard 0.5μm CMOS technology for an input current of ±0.1μA at the supply voltage of 3V. The input impedances of the proposed current comparator are 123 ω and 126 ω while the maximum output voltage variation is only 1.9%.
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A 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifier
(2012-10-02)
Mitwong, Hanphon
;
Kasemsuwan, Varakorn
This paper presents a 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifiers (PFWR). The circuit is designed based on improved Wilson current mirrors. All MOS transistors are biased on the edge of conduction, enabling the circuit to operate at low voltage with low power consumption. Negative feedback mechanism of the Wilson current mirror and cross coupling techniques have been employed to reduce the input impedance. Spectre is used to perform the simulation and the results show the frequency of operation as high as 100 MHz using a standard 0.13 μm CMOS technology. The mismatch between the input and rectifier's output is 0.24% for an input current of ±100 μA. The DC transfer characteristic shows good linearity, very sharp corner at zero crossing point and good symmetry during positive and negative input cycle, while power dissipation is 570 nW © 2012 IEEE.

Kasemsuwan, Varakorn

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