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    A robust high-speed low input impedance CMOS current comparator
    (2008-12-01) ;
    Khucharoensin, Surachet
    In this paper, a robust high-speed low input impedance CMOS current comparator is proposed. The front end of the comparator uses the modified Wilson current-mirror and diode-connected transistors to perform a current subtraction and current to voltage conversion simultaneously. The circuit is immune to the process variation and has low input impedances. HSPICE is used to verify the circuit performance with a 0.5 μm CMOS technology. The simulation results show the propagation delay of 1.67 ns, input impedances of 123 Ω, and 126 Ω, and average power dissipation of 0.63 mW for ± 0.1 μA input current under the supply voltage of 3 V. © 2008 World Scientific Publishing Company.
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    Low-voltage bulk-driven QFG-regulated self-cascode super MOS transistor
    (2016-09-06)
    Thongleam, Thawatchai
    ;
    Suadet, Apirak
    ;
    A bulk-driven super MOS transistor (BD-SMT) for low voltage operation is presented. The proposed transistor achieves a high effective transconductance (G<inf>m(eff)</inf>), high effective drain impedance (R<inf>D(eff)</inf>) and low effective source impedance (R<inf>S(eff)</inf>). BD-SMT is designed based on regulated self-cascode and negative feedback techniques. The transistor been designed using a 0.18 μm CMOS technology and operated from a 0.4 V supply with a static power consumption of 12 μW. The simulation results showed higher G<inf>m(eff)</inf>, larger R<inf>D(eff)</inf> and smaller R<inf>S(eff)</inf> as compared to those of simple bulk-driven MOS transistor.
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    A current-mode common-mode feedback circuit (CMFB) with rail-to-rail operation
    (2011-06-13)
    Suadet, Apirak
    ;
    This paper presents a current-mode commonmode feedback (CMFB) circuit with rail-to-rail operation. The CMFB is a stand-alone circuit, which can be connected to any low voltage transconductor without changing or upsetting the existing circuit. The proposed CMFB employs current mirrors, operating as common-mode detector and current amplifier to enhance the loop gain of the CMFB. The circuit employs positive feedback to enhance the output impedance and gain. The circuit has been designed using a 0.18 μm CMOS technology under 1 V supply and analyzed using HSPICE with BSIM3V3 device models. A pseudodifferential amplifier using two common sources and the proposed CMFB shows rail to rail output swing (± 0.7 V) with low common-mode gain (-36 dB) and power dissipation of 390 μW. Copyright © 2011 De Gruyter.
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    An analytical transit time model for short channel MOSFET's
    (2000-12-01)
    An analytical transit time model for short channel MOSFET is presented. Several second order effects such as short channel and narrow width effects, mobility degradation, parasitic drain and source resistance, velocity saturation and channel length modulation are included in the model. The model shows good agreements with the experimental and two dimensional numerical data over a wide range of biasing conditions. © 2000 IEEE.
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    A 3Volt high frequency and low input impedance CMOS current-mode precision full-wave rectifier
    (2002-12-01)
    Khucharoensin, Surachet
    ;
    This paper presents a 3Volt high frequency and low input impedance CMOS current mode precision full-wave rectifier. The circuit is designed based on an improved Wilson current miller. All MOS transistors are biased at low current resulting in small power dissipation. Negative feedback has been employed to reduce the input impedance of the circuit(236Ω). HSPICE is used to perform the simulation and the result shows the frequency of operation as high as 100 MHz with a standard 0.5μm CMOS technology. The mismatch obtained from the input and rectifier's output is 0.21% for an input current of ±150μA. The DC transfer characteristic shows good linearity, very sharp corner at zero crossing point and good symmetry during positive and negative input cycle while power dissipation is 5.8μW. © 2002 IEEE.
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    A 0.5 volt rail-to-rail CMOS pseudo-differential OTA using simple feed-forward technique
    (2011-08-12)
    Suadet, Apirak
    ;
    Thongleam, Thawatchai
    ;
    ;
    This paper presents a low voltage CMOS pseudo differential OTA using simple feed-forward technique. The circuit employs feed-forward technique to suppress the common-mode gain, and positive feedback to enhance the output impedance. The circuit is designed using 0.18 μm CMOS technology under 0.5 V supply. The simulation results show rail-to-rail input/output swing, achieved with low common-mode gain (-35 dB). The output swing of the circuit is 0.3 Vpp. The power dissipation of the circuit is 50 μW. © 2011 IEEE.
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    Low voltage adjustable CMOS Schmitt trigger
    (2011-07-01)
    Singhanath, Pratchayaporn
    ;
    Suadet, Apirak
    ;
    Kanjanop, Arnon
    ;
    Thongleam, Thawatchai
    ;
    Kuankid, Sanya
    This paper presents a low voltage adjustable CMOS Schmitt trigger using dynamic threshold MOS (DTMOS). Cross-coupled inverter with body control is employed to speed up the switching process, and control the intensity of the feedback. The proposed Schmitt trigger has been designed using 0.18 m 0.4 V CMOS technology and analyzed using PSPICE with BSIM3V3 device models. The simulation results show rail-to-rail operation and independently adjustable switching voltages for both low-to-high (V<inf>T(LH)</inf>) and high-to-low (V <inf>T(HL)</inf>) as high as 15 % of the supply voltage. The power dissipation is 0.13 W. © 2011 IEEE.
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    An analytical model of short channel MOSFET including velocity overshoot
    (2002-01-01)
    In this paper, an analytical model of short channel MOSFET including velocity overshoot is proposed. The model is developed based on the solution of energy balance equation under the assumption of displaced Maxwellian distribution. The resulting model is the augmented drift-diffusion velocity model. The parameters involved in the velocity model are physical parameters with only one fitting parameter. The model also includes the effects of the mobility degradation, drain induced barrier lowering effect, source drain series resistance and the channel length modulation. The theoretical predictions of the model are compared with the experimental data and shown to be in good agreement over a wide range of bias conditions. © 2002 IEEE.
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    A physics-based model of short channel MOSFET including velocity overshoot
    (2002-12-01)
    This paper presents a physics-based modeling of short channel MOSFET including velocity overshoot. The model is developed based on the solution of energy balance equation under the assumption of drifted Maxwellian distribution. Electron temperature is analytically obtained along the channel and the thermoelectric current is then derived. The model includes the effects of the mobility degradation, channel length modulation, drain induced barrier lowering and parasitic drain source resistance. The theoretical predictions of the model are compared with the experimental data and shown to be in good agreement over a wide range of bias conditions. © 2002 IEEE.
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    A CMOS inverter-based class-AB pseudo differential amplifier for HF applications
    (2010-12-01)
    Suadet, Apirak
    ;
    This paper presents a CMOS inverter-based class-AB pseudo differential amplifier for HF applications using new simple rail-to-rail CMFB circuit. The proposed circuit employs two CMOS inverters and the complementary common-mode feedback (CMFB) consisting of current mode common-mode detector and transimpedance amplifiers. The circuit has been designed using 0.18 μm CMOS technology under 1 V supply, and the simulation results shows that the rail to rail output swing is achieved with low common-mode gain (-15 dB). The output swing of the circuit is 0.7 V. The power dissipation of the circuit is 96 μW. © 2010 IEEE.