Riewruja, Vanchai

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Riewruja, Vanchai
Alternative Name
Riewruja, V.
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vanchai.ri@kmitl.ac.th

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    Item type:Publication,
    An amplitude detector for variable frequency sinusoidal signals
    (2006-12-01)
    Raksachat, Pariwat
    ;
    Chaikla, Amphawan
    ;
    Kaewpoonsuk, Anucha
    ;
    Riewruja, Vanchai
    ;
    Julsereewong, Prasit
    In this paper, a JK-flip-flop-based logic circuit is described. Using two output signals of this designed logic circuit to control a buffered peak detector followed by a simple sample-and-hold circuit in sequential operation, a sinusoidal amplitude detector is proposed. The proposed detector allows the frequency of input signals to be varied over a wide range. Experimental results verifying the performances of the proposed circuit are in close agreement with the expected values. © 2006 ICASE.