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CMOS sample-and-hold circuit using current conveyor analogue switch
Author(s)
Date Issued
January 18, 2017
Type
Conference Paper
Abstract
This paper presents a new CMOS sample-and-hold (S/H) circuit employing one second-generation current conveyor (CCII), one resistor and one capacitor. Unlike, conventional S/H circuits, the proposed S/H circuit is absent from MOS switches. The proposed S/H circuit uses CCII to work as analog switch (CCAS) which high speed on-off status of switch and without buffer circuit can be obtained. The status on-off of switch is controlled by bias current. This bias current is sampling pulse that used for sampling input signal. The proposed S/H circuit is suitable for low-power and high accuracy for signal processing applications. The simulation results are used to confirm the workability of the proposed circuit.
Citation
2016 International Symposium on Intelligent Signal Processing and Communication Systems Ispacs 2016, 2017