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Low-voltage current-mode preamplifier based Latch comparator

Author(s)
Jankatkit, Thongchai
Kasemsuwan, Varakorn
Date Issued
September 6, 2016
Type
Conference Paper
DOI
10.1109/ECTICon.2016.7561254
Abstract
This paper presents a low-voltage latch current comparator. The circuit was designed on the basis of current mirror, preamplifier and latch circuits and also various circuit techniques; quasi-floating gate to reduce the input impedance, bulk driven technique for the circuit to be operable under low supply voltage and positive feedback to increase the gain and the overall speed. From the simulation results, which were presented with 0.18 um CMOS technology, the circuit can operate well at the supply voltage of 0.5 volt and the resulting propagation delay time were 2.2 nS and 1.4 nS when the input current differences are 1 uA and 10 uA, respectively. The total power dissipation was 79 uW.
Citation
2016 13th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2016, 2016
Subjects

current comparator

dynamic latch compara...

low voltage

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