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A GHz analog multiplier for UWB communications
Author(s)
Date Issued
December 1, 2007
Type
Conference Paper
Abstract
A gigahertz wideband analog multiplier is proposed. The multiplier based on the MOS cascade operation circuit. The inputs are in voltage mode and become in current mode after multiplication. The result shows that the multiplier can be applied for UWB communications. The circuit is based on 0.18 μm CMOS technology simulated using HSPICE with level 49. ©2007 IEEE.
Citation
2007 Asia Pacific Conference on Communications Apcc, 55-58, 2007