The low power 3D-magnetotransistor based on CMOS technology

Leepattarapongpan, Chana; Phetchakul, Toempong; Penpondee, Naritchaphan; Pengpad, Puttapon; Srihapat, Arckom; Chaowicharat, Ekalak; Hruanun, Charndet; Poyai, Amporn

doi:10.1109/ICSENS.2011.6127079

The low power 3D-magnetotransistor based on CMOS technology

Author(s)

Leepattarapongpan, Chana

Phetchakul, Toempong

Penpondee, Naritchaphan

Pengpad, Puttapon

Srihapat, Arckom

Chaowicharat, Ekalak

Hruanun, Charndet

Poyai, Amporn

Date Issued

December 1, 2011

Type

Conference Paper

DOI

10.1109/ICSENS.2011.6127079

Abstract

This article presents a 3D magnetotransistor for detecting magnetic field in three dimensions (B X, B Y, and B Z) by relying on the difference between base and collector currents (ΔI CB). This device used low biasing current. It was designed and fabricated using CMOS fabrication technology. The device structure consisted of one emitter, 4 collectors and 4 bases. LOCOS oxide was grown to surround the emitter area to limit lateral carrier loss, and therefore reducing the overall biasing current. The experiment showed that, at 0.2 mA of biasing current, the BX, BY and BZ direction sensitivity to magnetic field within the range of 0 - 400 mT are 0.05, 0.07 and 0.145 mV/mT, respectively. © 2011 IEEE.

Citation

Proceedings of IEEE Sensors, 500-503, 2011