A 0.8 V quasi-floating-gate fully differential CMOS op-amp with positive feedback

Thongleam, Thawatchai; Suadet, Apirak; Kasemsuwan, Varakorn

doi:10.1109/ECTICON.2011.5947780

A 0.8 V quasi-floating-gate fully differential CMOS op-amp with positive feedback

Author(s)

Thongleam, Thawatchai

Suadet, Apirak

Kasemsuwan, Varakorn

Date Issued

August 12, 2011

Type

Conference Paper

DOI

10.1109/ECTICON.2011.5947780

Abstract

This paper presents a 0.8 V fully differential CMOS op-amp. The input stage of the circuit is designed using quasi-floating-gate (QFG) transistors with positive feedback, while QFG transistors in the output stage are connected in the class AB configuration. QFG transistors are employed, enabling the circuit to operate under low supply voltage. The proposed amplifier is designed using 0.18 μm CMOS technology, and simulation results show rail-to-rail input and output swings. The open-loop gain is 80.4 dB with the gain-bandwidth product of 8.66 MHz. Phase margin is 45° (CL= 20 pF). The CMRR is 107 dB (at 1 kHz) and the power consumption is 54.9 μW. © 2011 IEEE.

Citation

Ecti Con 2011 8th Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Association of Thailand Conference 2011, 98-101, 2011