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Designing a Fine-Tuning Tool for Machine Learning with High-Speed and Low-Power Processing
Author(s)
Date Issued
December 24, 2018
Type
Conference Paper
Abstract
Machine learning is used in various fields. In order to broaden its further applications, it is necessary to use an architecture that operates faster and with lower-power consumption than conventional architecture. In this paper, as an architecture for that, it is proposed to use the ASIC-FPGA architecture proposed by the authors. In circuits on FPGAS, wave-pipeline techniques can be introduced for further high through put processing. In order to further improve the performance of wave-pipelines on the FPGAS, fine-Tuning should be executed. A fine-Tuning tool essential for realizing these is developed.
Citation
Iscit 2018 18th International Symposium on Communication and Information Technology, 204-207, 2018