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A 3 gb/s 80 db CMOS differential transimpedance amplifier for optical communication systems
Author(s)
Date Issued
December 1, 2005
Type
Conference Paper
Abstract
In this paper, a 3 Gb/s 80 dB differential CMOS transimpedance amplifier is proposed. The shunt-shunt feedback configuration is used to compromise between the wide bandwidth of the low impedance design and the low noise performance of the high impedance design. The basic amplifier employs fT doubler and compensation capacitor techniques to enhance the bandwidth. The phantom zero introduced by the feedback network is used to position the pole in any desired region of the close loop systems. HSPICE is used to verify the circuit performance with a standard 0.5 μm CMOS technology and supply voltage of 2.5 V. Simulation results demonstrate the gain and the speed of operation of 80 dB and 3 Gb/s respectively. The equivalent input noise current spectral density is found to be 7.8 pA√ Hz at 1 GHz and the total power dissipation is 58.4 mW. © 2005 IEEE.
Citation
Proceedings IEEE International Symposium on Circuits and Systems, 1614-1617, 2005