Analysis of FF H1 segment macrocycles for feedforward control with hybrid architecture

Abstract

This paper aims at providing an analysis of segment macrocycles generated for feedforward control using Foundation Fieldbus (FF) technology. An FF H1 segment performed at the DeltaV integrated host with specific functionality to maintain synchronization at the interface card level for temperature control is used to implement the feedforward loops with hybrid architecture for examining how different control configurations affect the synchronization of measurement, calculation, and control with the communications between devices as well as the scheduled communication loads during calculated segment macrocycles, which could have impacts on performances of overall system. Based on hybrid architecture, some function blocks utilized to build the feedforward control loop can be placed to run in the field devices, and others can be located to run in either the host controller or the H1 interface card. Experimental results verifying the impacts of function block synchronization and communication load on the control performance are also included.