Julsereewong, Amphawan

Preferred name

Alternative Name

Julsereewong, A.

Main Affiliation

School of Engineering

amphawan.ju@kmitl.ac.th

Now showing 1 - 10 of 96

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A simple CMOS-based algorithmic ADC
(2007-12-01)
Kaewpoonsuk, Anucha
;
Cheypoca, Thepjit
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Julsereewong, Amphawan
;
Riewruja, Vanchai
This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter. The proposed converter comprises of full-wave rectifier, current mirrors, and current comparator. The realization method is simple, small in size, and suitable for integrated circuit form. The design strategy is based on the MOS biased at the edge of conduction to provide a low accumulated error and a low distortion in the transfer characteristic. An N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results supporting the characteristics of proposed circuit are agreed with the expected values. © ICROS.
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Design of a non-thermal food processing system utilizing wire discharge of dual electrodes in underwater
(2018-06-01)
Eguchi, Kei
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Jaiwanglok, Anurak
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Julsereewong, Amphawan
;
Asadi, Farzin
;
Abe, Hiroto
To provide nutritious and fresh processed foods, non-thermal food processing technologies have been developed in recent years. Among others, a non-thermal food processing method utilizing underwater shockwaves has cost-effectiveness. In this method, the design of a high voltage multiplier and its discharging method are key factors for processing target foods effectively. This paper proposes a non-thermal food processing system utilizing wire discharge of dual electrodes in underwater. Unlike conventional non-thermal food processing systems, the proposed system has two pairs of electrodes with thin metal wires. Owing to the electric discharge using thin metal wires, the energy to generate underwater shockwaves can be decreased. For this reason, by only one electric discharge, both sides of the target food are crushed by the proposed technique. The experiments using a laboratory prototype clarified that the proposed method can soften the whole flesh of the target food effectively. Furthermore, by assuming a four-terminal model, an equivalent model of the high voltage multiplier was analyzed theoretically. Concerning the series-connected voltage multiplier, the design conditions were derived to estimate the characteristics such as output voltage and power efficiency.
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Simple vector summation circuit using opamps
(2011-01-01)
Kamsri, Thawatchai
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Julsereewong, Amphawan
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Keawpoonsuk, Anucha
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Petchmaneelumka, Wandee
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Riewruja, Vanchai
This paper presents a vector summation circuit using operational amplifiers (opamps) for multiple voltage inputs. The implementation method based on the opamp supply-current sensing utilizes an inherently quadratic characteristic of the opamp class-AB output stage. The distinguishing features of the proposed implementation are simple configuration and low cost. Experimental results verifying the performances of the proposed vector summation circuit are included. © 2011 SICE.
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Design of a nesting-type switched-capacitor AC/DC converter using voltage equalizers
(2017-01-01)
Eguchi, Kei
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Junsing, Tipparat
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Julsereewong, Amphawan
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Do, Wanglok
;
Oota, Ichirou
For electric appliances, an electric circuit that changes an alternating current (ac) into a direct current (dc) is necessary. Among others, a small and light ac/dc converter is indispensable to develop novel mobile devices. As one of the most promising design approaches, the ac/dc converter designed by switched-capacitor (SC) techniques attracts many researchers’ attention, because the SC ac/dc converter can be implemented without a high turn ratio transformer. Owing to the heavy transformer-less design, the SC ac/dc converter can realize smaller size and lighter weight than traditional ac/dc con-verters. However, the SC ac/dc converter suffers from complexity of the circuit control and the inflexibility of conversion ratio. To overcome these problems, this paper proposes a nesting-type SC ac/dc converter using voltage equalizers. Unlike conventional SC ac/dc converters, the proposed converter consists of a full waveform rectifier with a big capaci-tor and nested voltage equalizers. In the nested voltage equalizers, a part of the capacitor voltage of a voltage equalizer is converted by other voltage equalizers, where each voltage equalizer is controlled by non-overlapped two-phase clock pulses. By the nesting conver-sion, the conversion ratio of the proposed converter is expressed as a reverse value of the total sum of main capacitors’ voltage ratios. Therefore, the proposed converter can achieve not only simple circuit control but also flexible conversion ratios. Concerning the 1/9× step-down SC ac/dc converter, the advantages of the proposed converter were investigated by theoretical analysis, simulated program with integrated circuit emphasis (SPICE) simulations, and experiments. First, mathematical formulas for estimating the characteristics of the proposed converter were derived theoretically by utilizing a simple four equivalent circuit. Then, by comparing the proposed converter with conventional SC ac/dc converters, the effectiveness of the proposed converter was clarified by SPICE simulations. Finally, the feasibility of the proposed converter was confirmed by using the experimental circuit implemented on a breadboard.
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Safety and availability of basic process control using foundation fieldbus with control in the field - An experimental analysis
(2017-08-01)
Sangsuwan, Thaksin
;
Thepmanee, Teerawat
;
Julsereewong, Amphawan
Detailed knowledge of how to balance between safety and availability for instruments is essential to successful design and implementation in fieldbus-based process control systems. The configuration correctness is crucial to actually obtain the benefits of digital fieldbus technology used. In actuality, a number of device parameters must be set to provide the required functionalities. This paper focuses on improving safety and availability for the proportional-integral-derivative (PID) and cascade control strategies using Foundation Fieldbus (FF) with control in the field. The aim of this paper is to analyze the logical behaviors of PID and cascade loops in two conflicting purposes for studying how different configuration options affect the interlocks between function blocks located in instruments as well as the initialization and fail-safe mechanisms in response to invalid measurements. For safety purpose, the interested control loops are configured to bring the process to a safe state in the presence of a fault. For availability purpose, the interested control loops are configured to keep the process running in the event of a failure. A water tank process is utilized as a case study for control loop implementations. Interactions between the status propagation and mode shedding for demonstrating the studied control loop behaviors are examined experimentally in Petri net models. In addition, the function block options for bumpless transfer and setpoint tracking are also described. The proved configuration method for proper operations in balancing the interests of safety and availability is proposed.
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Comparative study on cascade control configuration in engineering phase for analog system and FF system
(2017-02-06)
Khochasin, Narupon
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Trisuwannawat, Thanit
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Julsereewong, Prasit
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Julsereewong, Amphawan
This paper presents a comparative study of two configuration techniques for building cascade control loops in engineering phase by using traditional analog system and modern digital Foundation Fieldbus (FF) system. For both analog and FF systems, control strategy configurations for providing the process control loop with high safety and the process control loop with high availability are described. The engineering software of the CentumVP host system is used to build the studied control systems, and it is also employed to check the consistency of the configurations. Comparison results show that the smart FF devices provide powerful functionalities for ease of engineering to take special actions in the events of undesired conditions. In addition, the results from the studied cases can be the practical guideline to configure the interlocks that are essential for system safety and availability.
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A voltage/current controlled oscillator using OTAs and RS flip flop
(2008-12-01)
Pongswatd, Sawai
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Julsereewong, Amphawan
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Tirasesth, Kitti
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Sasaki, Hirofumi
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Shi, Yan
This paper presents an electronic oscillator specially designed to be controlled in oscillation frequency by the control voltage and external bias current signals. The realization technique is simple and inexpensive based on the use of commercial available devices. The proposed circuit consists of operational transconductance amplifiers (OTAs) and an RS Flip Flop to generate tunable sawtooth and square waves. Experimental results verifying the performances of the proposed circuit are in close agreement with the expected values. An application example showing the usefulness of the proposed voltage controlled oscillator in phase-locked loop frequency synthesizer is also introduced. © 2008 SICE.
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Design of a high-voltage multiplier combined with Cockcroft-Walton voltage multipliers and switched-capacitor AC-AC converters
(2017-06-01)
Eguchi, Kei
;
Wongjan, Anan
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Julsereewong, Amphawan
;
Do, Wanglok
;
Oota, Ichirou
In recent years, the non-thermal food processing is receiving much attention, because the non-thermal food processing can offer nutritious and fresh processed foods at low cost. In the non-thermal food processing, an underwater shockwave is utilized by discharging a high voltage in water. To generate the underwater shockwave, this paper proposes a novel high voltage multiplier designed by connecting a bipolar Cockcroft- Walton voltage multiplier (CWVM) with a switched-capacitor (SC) direct ac-ac converter in series. In the proposed multiplier, first, an ac input is amplified to double by the inductor-less ac-ac converter. Then, the output of the ac-ac converter is stepped-up again by the bipolar CWVM. Therefore, owing to the inductor-less series-connected bipolar topology, the proposed multiplier can achieve smaller size and higher gain than existing multipliers. Concerning the proposed multiplier with 26 × step-up gain, the operation principle and theoretical analysis are discussed in detail. Furthermore, the feasibility and effectiveness of the proposed multiplier are demonstrated by simulation program with integrated circuit emphasis (SPICE) simulations.
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Simple resistance-to-time converter with lead-wire-resistance compensation
(2011-01-01)
Julsereewong, Prasit
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Julsereewong, Amphawan
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Rerkratn, Apinai
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Pootharaporn, Nakorn
This paper presents a simple resistance-to-time converter for remotely measuring resistance of single resistive sensors. The proposed circuit employs commercially available devices to generate the output pulse whose time interval is linearly proportional to the sensing resistance. Experimental results are given to confirm not only the good operation but also the effective lead-wire-resistance compensation of the proposed converter. © 2011 SICE.
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Buck converter controlled by using variable switching frequency technique
(2008-12-01)
Julsereewong, A.
;
Pongswatd, S.
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Julsereewong, P.
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Tirasesth, K.
;
Sasaki, H.
In this paper, a linearly tunable voltage controlled oscillator with negatively proportional characteristic, termed VCO, is described. Using the VCO and analog PI controller in feedback path of a buck converter operating in continuous condition mode, a control technique with variable switching frequency is presented. No filtering capacitor is required in the proposed technique that provides the advantage of a simple and compact structure. Experimental results show that the output voltage ripple can be reduced. The output voltage regulation can be also kept in constant without stability problems. © 2008 IEEE.

Julsereewong, Amphawan

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