Four-quadrant CMOS analog divider

Parnklang, J.; Arammongkonwichai, C.; Kongtanasunthorn, P.

Four-quadrant CMOS analog divider

Author(s)

Parnklang, J.

Arammongkonwichai, C.

Kongtanasunthorn, P.

Date Issued

December 1, 1998

Type

Article

Abstract

The novel four-quadrant analog divider circuit is presented. Essentially, it consists of two building blocks of circuits, a basic analog divider circuit, and a switching part. Analog divider circuit can be implemented by a second-generation current conveyor (CCII), which compose with two MOS transistors biased in non-saturation region, a voltage buffer and a resistor. The SPICE simulation results are given to verify the theoretical analysis.

Citation

IEEE Asia Pacific Conference on Circuits and Systems Proceedings, 271-274, 1998