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Throughput of a Firewall Unit on FPGAS Developed by the RTL Design Methodology

Author(s)
Sato, Tomoaki
Chivapreecha, Sorawat
Moungnoul, Phichet
Higuchi, Kohji
Date Issued
October 19, 2017
Type
Conference Paper
DOI
10.1109/IEECON.2017.8075819
Abstract
The transmission speed of mobile communication systems for mobile and IoT (Internet of things) devices is getting faster. Advanced, high-speed and low-power processing on network packets are needed in these devices. To realize these performances in the devices, the authors have proposed FPGAS (field-programmable gate arrays) which are developed by the RTL (register-Transfer level) design methodology. As an application of the FPGAS for mobile communication systems, a firewall unit has been developed. However, the function of the firewall unit is only packet filtering. A function for deleting a packet passing through an unauthorized port has not been realized. In this paper, the authors design the firewall unit with the function of deleting the packet. The throughputs of the firewall unit are shown. Thus, it is clarified that high throughput can be accommodated.
Citation
2017 International Electrical Engineering Congress Ieecon 2017, 2017
Subjects

ASIC-FPGA co-design

FPGA

FPGA

IDS

IoT device

IPS

Mobile devices

RTL

RTL

Throughput

Metrics
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