Performance comparison of bit-level median filtering circuits based on binary search algorithm

Abstract

Implementing bit-level median filtering circuits based on binary search algorithm is one of powerful methods to provide simple and modular configurations. The aim of this paper is to compare the performances of four median filtering circuits utilizing binary search algorithm in terms of operation time and power consumption, which are major characteristics for signal and image processing in real time. These studied filtering circuits are implemented through the employment of existing logic control and majority voting modules. Two different configurations of logic control module as well as two different configurations of majority voting module for four possible circuit realizations are described. LabVIEW simulation results are employed for verifying the performances of the studied median filtering circuits.