A versatile vector summation circuit

Netbut, Chuachai; Kumngern, Montree; Prommee, Pipat; Dejhan, Kobchai

doi:10.1109/ISCIT.2006.339947

A versatile vector summation circuit

Author(s)

Netbut, Chuachai

Kumngern, Montree

Prommee, Pipat

Dejhan, Kobchai

Date Issued

December 1, 2006

Type

Conference Paper

DOI

10.1109/ISCIT.2006.339947

Abstract

A versatile vector summation circuit is presented. It is based on CMOS dual translinear loops as operate in class AB and current mirrors, which leads to the input signal can be voltage and/or current into a single circuit without changing the circuit configuration. The circuit exhibits wide input range, low power consumption and good temperature stability. Simulation and experimental results verifying theoretical analyses are given. © 2006 IEEE.

Citation

2006 International Symposium on Communications and Information Technologies Iscit, 1093-1096, 2006