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A vector summation circuit using DXCCIIs
Author(s)
Kunglee, Supavadee
Date Issued
December 1, 2013
Type
Conference Paper
Abstract
This paper presents a new analog vector summation using dual-X second-generation current conveyors (DXCCIIs) as active element. The proposed vector summation employs two DXCCIIs and seven MOS transistors operating in saturation region, which is suitable for integrated circuit implementation. The circuit offers the high operating frequency using MOS transistors operating in saturation region. PSPICE simulators using 0.35 μm TSMC CMOS process are used to validate the workability of the new circuit. The simulation results show that the circuit has a -3 dB bandwidth of 517 MHz. © 2013 IEEE.
Citation
International Conference on Advanced Technologies for Communications, 724-727, 2013