Single low-supply current-mode CMOS analog multiplier circuit

Prommee, Pipat; Somdunyakanok, Montri; Kumngern, Montree; Dejhan, Kobchai

doi:10.1109/ISCIT.2006.339949

Single low-supply current-mode CMOS analog multiplier circuit

Author(s)

Prommee, Pipat

Somdunyakanok, Montri

Kumngern, Montree

Dejhan, Kobchai

Date Issued

December 1, 2006

Type

Conference Paper

DOI

10.1109/ISCIT.2006.339949

Abstract

A simple structure of low-voltage current-mode CMOS analog multiplier circuit is presented. This multiplier circuit is based-upon quarter square algebraic identity technique by using CMOS technology. The transistors are operated in saturation region for different sub-circuits. The electronic resistor circuits are used as the input stage. The differential amplifiers are used for biased the squaring circuits. The current-mode operation can be obtained with a single supply, low-voltage, high-linearity and wide-bandwidth. This paper consists of 16 NMOSs with a 1.5 volts single supply. The achieved circuit performances have been carried out by PSpice. The input range is obtained more than ±100μA with linearity error less than 1%. The frequency response can be operated larger than 150 MHz. © 2006 IEEE.

Citation

2006 International Symposium on Communications and Information Technologies Iscit, 1101-1104, 2006