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A new model for predicting the effect of temperature and devices dimension on threshold voltage of PMOS in VLSI
Author(s)
Date Issued
August 17, 2015
Type
Conference Paper
Abstract
This paper presents a new model for predicting the effect of temperature and the devices dimension on the threshold voltage of PMOS. Temperature-dependent models have been developed including the temperature affect of surface potentials, intrinsic carrier concentration and energy band gap. The developed models have been used to study the temperature dependent and narrow channel width on the threshold voltage of PMOS. The new temperature coefficient for threshold voltage and the body-bias coefficient of threshold voltage of a big PMOS and a narrow channel width of MOSFET are proposed. The model can be implemented in simulation tools with the error is less than 3%.
Citation
Ecti Con 2015 2015 12th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology, 2015
Subjects