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A ± 1.5 V high frequency four quadrant current multiplier

Author(s)
Arthansiri, Teerawat
Kasemsuwan, Varakorn
Ahn, Hyung Keun
Date Issued
December 1, 2005
Type
Conference Paper
DOI
10.1109/ISCAS.2005.1464763
Abstract
This paper presents a four quadrant current multiplier based on the square-law characteristic of MOS transistor operating in the saturation region. The current multiplier consists of four quadratic cells using only NMOS transistor. The circuit operates using the supply voltages of ± 1.5 V and with the quiescent current of 25 μA. The nonlinearity is 0.36 % when the input current is the same as the bias current and reduced to only 0.1 % when input current is reduced by half. The cut-off frequency is 413 MHz with a total harmonic distortion less than 0.15 % (at 1 MHz). The power dissipation is 0.45 mW. © 2005 IEEE.
Citation
Proceedings IEEE International Symposium on Circuits and Systems, 1016-1019, 2005
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