Design and implementation multilevel inverter for 3φ induction motor speed control with RBM chopper technique embedded on FPGA

Abstract

This paper introduces on designing of Regular-based Binary Multiplier: RBM signal embedded on Field Programmable Gate Array: FPGA, which control induction motor speed. Various form of 8-bit RBM signal are generated and choppered with the multi level -inverter output voltage whose switching angle is provided for determining amplitude of fundamental frequency and eliminating unrequired low-order harmonics. Objectives of this switching technique is improvement of the inverter output signal in term of total harmonic distortion voltage reduction (%THD) while controlling the motor. Such motor's efficiency and performance are improved while voltage to frequency ratio is maintained constantly for stable torque during control. © 2006 IEEE.